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SP58C20DWR PDF预览

SP58C20DWR

更新时间： 2024-11-01 20:01:23
品牌 Logo 应用领域
德州仪器 - TI 光电二极管
页数 文件大小 规格书
17页 257K
描述
Audio-Band Converter 20-SOIC 0 to 70

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中文翻译

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SP58C20DWR 技术参数

是否无铅： 含铅生命周期：Obsolete
零件包装代码：SOIC包装说明：PLASTIC, SOIC-20
针数：20Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.82
模拟集成电路 - 其他类型：ANALOG CIRCUITJESD-30 代码：R-PDSO-G20
长度：12.8 mm功能数量：1
端子数量：20最高工作温度：70 °C
最低工作温度：封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE认证状态：Not Qualified
座面最大高度：2.65 mm最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V标称供电电压 (Vsup)：5 V
表面贴装：YES温度等级：COMMERCIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL宽度：7.5 mm
Base Number Matches：1

SP58C20DWR 数据手册

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SPSS015B − DECEMBER 1993 − REVISED JULY 1996  
DW PACKAGE  
(TOP VIEW)  
D
Analog Portion of ADC and DAC for  
Audio-Band Signal-Processing  
Applications  
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20  
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11  
V
NC  
NC  
SUB  
NC  
D
D
5-V Supply Voltage  
V
AOP  
AOM  
DIGS  
DIGL  
ADCLK  
Oversampling Second-Order Sigma-Delta  
Modulator  
SS  
AIP  
AIM  
D
1.024-MHz Master Clock Frequency  
PWAD  
PWDA  
ADOUT  
NC  
D
On-Chip Continuous-Time Antialiasing and  
Smoothing Filters  
V
DD  
NC  
NC  
D
D
D
High-Performance Fully Differential and  
Symmetrical Analog Data Paths  
NC  
Internal Reference Voltage and  
Common-Mode Bias Voltage Generation  
NC − No internal connection  
Very Low Power Consumption Mode  
description  
The MSP58C20 is the analog portion of an audio-band sigma-delta analog-to-digital and digital-to-analog  
converter and is a companion part to the MSP58C80. The MSP58C20 is designed to operate only with the  
MSP58C80, which contains the digital portion of the audio-band converter. The circuit consists of three main  
blocks: the analog-to-digital converter (ADC), the digital-to-analog converter (DAC), and internal reference and  
bias voltages.  
The analog-to-digital conversion chain consists of a continuous-time antialiasing stage, an analog oversampled  
modulator, and the modulator bias voltage. The antialiasing stage is a second-order low-pass filter with a cutoff  
frequency of typically 190 kHz. The modulator is a sigma-delta feedback loop, which oversamples the signal  
at 1.024 MHz and provides second-order noise shaping. It performs the conversion of the differential analog  
input signal to a pulse-density-modulated single-bit digital output (ADOUT). When a maximum positive  
differential input voltage (i.e., a maximum positive voltage difference of AIP − AIM) is applied at the AIP and AIM  
inputs, the resulting code at the ADOUT output is all ones.  
The digital-to-analog conversion chain consists of a fast DAC, an analog low-pass filter, and the filter’s bias  
voltage. The two input bits (DIGS and DIGL), sampled at 0.512 MHz from a digital modulator on the MSP58C80,  
are the inputs of the DAC conversion chain. Based on the values for DIGS (the sign bit) and DIGL (the level bit),  
the following table shows the DAC voltage steps that are produced.  
DIGS  
DIGL  
DAC VOLTAGE STEPS  
L
L
L
H
L
−1 × V  
−2 × V  
+1 × V  
+2 × V  
ref  
ref  
ref  
ref  
H
H
H
When DIGS = L, the AOM analog output has a more positive voltage than AOP. When DIGL = H, the absolute  
value of the voltage difference between AOP and AOM is greater than when DIGL = L. A band-gap voltage  
source is used to produce the DAC and ADC reference voltages. These two references are different to avoid  
crosstalk between the two converters.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 1996, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443  
1234567...17

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