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SP5659/KG/MP2S PDF预览

SP5659/KG/MP2S

更新时间: 2024-11-24 10:46:03
品牌 Logo 应用领域
加拿大卓联 - ZARLINK 光电二极管
页数 文件大小 规格书
12页 276K
描述
PLL Frequency Synthesizer, BIPolar, PDSO16, 0.150 INCH, PLASTIC, SOIC-16

SP5659/KG/MP2S 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:SOP, SOP16,.25Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.71
其他特性:SELECTABLE 2/1 OR 16/17 PRESCALER模拟集成电路 - 其他类型:PLL FREQUENCY SYNTHESIZER
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:9.9 mm功能数量:1
端子数量:16最高工作温度:80 °C
最低工作温度:-20 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:5 V认证状态:Not Qualified
座面最大高度:1.75 mm子类别:PLL or Frequency Synthesis Circuits
最大供电电流 (Isup):85 mA最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:BIPOLAR
温度等级:COMMERCIAL EXTENDED端子面层:MATTE TIN
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:3.9 mm
Base Number Matches:1

SP5659/KG/MP2S 数据手册

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SP5659  
2·7GHz I2C Bus Low Phase Noise Synthesiser  
Data Sheet  
January 2005  
The SP5659 is a single chip frequency synthesiser  
designed for tuning systems up to 2·7GHz.  
Ordering Information  
The RF preamplifier drives a divide-by two prescaler  
which can be disabled for applications up to 2GHz, allowing  
direct interfacing with the programmable divider, resulting in  
astepsizeequaltothecomparisonfrequency.Forapplications  
up to 2·7GHz the divide-by two is enabled to give a step size  
of twice the comparison frequency.  
SP5659/KG/MP1S 16 Pin SOIC Tubes  
SP5659/KG/MP1T  
16 Pin SOIC Tape & Reel  
SP5659/KG/MP2S 16 Pin SOIC* Tubes  
SP5659/KG/MP2T  
16 Pin SOIC* Tape & Reel  
*Pb Free Matte Tin  
The comparison frequency is obtained either from an on-  
chip crystal controlled oscillator or from an external source.  
The oscillator frequency FREF or the comparison frequency  
FCOMP may be switched to the REF/COMP output; this  
feature is ideally suited to providing the reference frequency  
for a second synthesiser such as in a double conversion  
tuner (see Fig. 5).  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CHARGE PUMP  
CRYSTAL  
REF/COMP  
ADDRESS  
SDA  
DRIVE  
V
EE  
RF INPUT  
RF INPUT  
The synthesiser is controlled via an I2C bus and responds  
to one of four programmable addresses which are selected  
by applying a specific voltage to the Address input. This  
feature enables two or more synthesisers to be used in a  
system.  
SP5659  
V
CC  
SCL  
ADC  
PORT P3  
PORT P2  
PORT P0  
PORT P1  
The SP5659 contains four switching ports, P0-P3 and a  
5-level ADC, the output of which can be read via the I2C bus.  
The SP5659 also contains a varactor line disable and  
charge pump disable facility.  
MP16  
Figure 1 – Pin connections – top view  
Features  
Complete 2·7GHz Single Chip System  
Optimised for Low Phase Noise  
Selectable 42 prescaler  
Variable I2C BUS Address for Multi-tuner Applications  
ESD Protection: 4kV, Mil-Std-883C, Method 3015 (1)  
Pin Compatible with SP5658  
Selectable Reference Division Ratio  
Selectable Reference/Comparison Frequency Output  
Selectable Charge Pump Current  
Varactor Drive Amplifier Disable  
5-Level ADC  
(1) Normal ESD handling precautions should be observed.  
Applications  
Satellite TV  
High IF Cable Tuning Systems  
Thermal Data  
uJC = 41°C/W  
uJA = 111°C/W  
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 2002-2005, Zarlink Semiconductor Inc. All Rights Reserved.  

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