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SNJ55LBC176

更新时间： 2024-11-16 04:31:11
品牌 Logo 应用领域
德州仪器 - TI 总线收发器
页数 文件大小 规格书
22页 456K
描述
DIFFERENTIAL BUS TRANSCEIVERS

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SNJ55LBC176 数据手册

 浏览型号SNJ55LBC176的Datasheet PDF文件第2页浏览型号SNJ55LBC176的Datasheet PDF文件第3页浏览型号SNJ55LBC176的Datasheet PDF文件第4页浏览型号SNJ55LBC176的Datasheet PDF文件第5页浏览型号SNJ55LBC176的Datasheet PDF文件第6页浏览型号SNJ55LBC176的Datasheet PDF文件第7页 
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SLLS067G − AUGUST 1990 − REVISED APRIL 2006  
D, JG, OR P PACKAGE  
(TOP VIEW)  
D
D
Bidirectional Transceiver  
Meets or Exceeds the Requirements of  
ANSI Standard TIA/EIA−485−A and  
ISO 8482:1987(E)  
R
RE  
DE  
D
V
B
A
1
2
3
4
8
7
6
5
CC  
D
D
High-Speed Low-Power LinBiCMOS  
Circuitry  
GND  
Designed for High-Speed Operation in Both  
Serial and Parallel Applications  
D
Low Skew  
FK PACKAGE  
(TOP VIEW)  
D
Designed for Multipoint Transmission on  
Long Bus Lines in Noisy Environments  
D
D
Very Low Disabled Supply Current . . . 200  
µA Maximum  
Wide Positive and Negative Input/Output  
Bus Voltage Ranges  
3
2
1
20 19  
18  
NC  
NC  
RE  
NC  
DE  
NC  
4
5
6
7
8
B
17  
16  
15  
14  
NC  
A
D
Thermal-Shutdown Protection  
NC  
D
Driver Positive-and Negative-Current  
Limiting  
9 10 11 12 13  
D
D
D
D
D
Open-Circuit Failsafe Receiver Design  
Receiver Input Sensitivity . . . 200 mV Max  
Receiver Input Hysteresis . . . 50 mV Typ  
Operates From a Single 5-V Supply  
NC−No internal connection  
Glitch-Free Power-Up and Power-Down  
Protection  
Function Tables  
D
Available in Q-Temp Automotive  
HighRel Automotive Applications  
Configuration Control / Print Support  
Qualification to Automotive Standards  
DRIVER  
INPUT  
ENABLE  
OUTPUTS  
D
H
L
DE  
H
H
A
H
L
B
L
H
Z
X
L
Z
description  
The  
SN55LBC176,  
SN65LBC176,  
RECEIVER  
SN65LBC176Q, and SN75LBC176 differential  
bus transceivers are monolithic, integrated  
circuits designed for bidirectional data communi-  
cation on multipoint bus-transmission lines. They  
are designed for balanced transmission lines and  
meet ANSI Standard TIA/EIA−485−A (RS-485)  
and ISO 8482:1987(E).  
DIFFERENTIAL INPUTS  
ENABLE  
OUTPUT  
V
= V −V  
RE  
L
L
L
H
L
R
H
?
L
Z
H
ID  
IA IB  
≥ 0.2 V  
V
ID  
−0.2 V < V < 0.2 V  
ID  
V
≤ −0.2 V  
X
ID  
Open  
H = high level, L = low level, ? = indeterminate,  
X = irrelevant, Z = high impedance (off)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
LinBiCMOS and LinASIC are trademarks of Texas Instruments Incorporated.  
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Copyright 2000−2006, Texas Instruments Incorporated  
ꢖ ꢘ ꢣ ꢛ ꢚꢦ ꢡꢠ ꢞꢟ ꢠꢚ ꢜꢣ ꢥꢗ ꢝꢘ ꢞ ꢞꢚ ꢭꢌ ꢃꢮ ꢕꢏ ꢍ ꢮꢯꢰꢂ ꢯꢂꢉ ꢝꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢝ ꢛ ꢢ ꢞꢢ ꢟꢞꢢ ꢦ  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...22

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