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SNJ54LV11AW PDF预览

SNJ54LV11AW

更新时间： 2024-11-24 21:55:19
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
6页 112K
描述
TRIPLE 3-INPUT POSITIVE-AND GATES

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SNJ54LV11AW 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：DFP, FL14,.3针数：14
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.84系列：LV/LV-A/LVX/H
JESD-30 代码：R-GDFP-F14长度：9.21 mm
负载电容（CL）：50 pF逻辑集成电路类型：AND GATE
最大I（ol）：0.006 A功能数量：3
输入次数：3端子数量：14
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DFP
封装等效代码：FL14,.3封装形状：RECTANGULAR
封装形式：FLATPACK包装方法：TUBE
电源：3.3 VProp。Delay @ Nom-Sup：14 ns
传播延迟（tpd）：21 ns认证状态：Not Qualified
施密特触发器：NO筛选级别：MIL-PRF-38535
座面最大高度：2.03 mm子类别：Gates
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL宽度：6.285 mm
Base Number Matches：1

SNJ54LV11AW 数据手册

 浏览型号SNJ54LV11AW的Datasheet PDF文件第2页浏览型号SNJ54LV11AW的Datasheet PDF文件第3页浏览型号SNJ54LV11AW的Datasheet PDF文件第4页浏览型号SNJ54LV11AW的Datasheet PDF文件第5页浏览型号SNJ54LV11AW的Datasheet PDF文件第6页 
SN54LV11A, SN74LV11A  
TRIPLE 3-INPUT POSITIVE-AND GATES  
SCES345A – DECEMBER 2000 – REVISED JULY 2001  
SN54LV11A . . . J OR W PACKAGE  
SN74LV11A . . . D, DB, DGV, NS, OR PW PACKAGE  
(TOP VIEW)  
2-V to 5.5-V V  
Operation  
CC  
Typical V  
(Output Ground Bounce)  
OLP  
<0.8 V at V = 3.3 V, T = 25°C  
CC  
A
1A  
1B  
2A  
2B  
2C  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
1C  
1Y  
3C  
3B  
3A  
3Y  
= 3.3 V, T = 25°C  
A
Support Mixed-Mode Voltage Operation on  
All Ports  
I
Supports Partial-Power-Down Mode  
off  
2Y  
GND  
Operation  
8
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
SN54LV11A . . . FK PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
3
2
1
20 19  
18  
1Y  
NC  
3C  
NC  
3B  
2A  
NC  
2B  
4
5
6
7
8
description  
17  
16  
15  
14  
These triple 3-input positive-AND gates are  
designed for 2-V to 5.5-V V operation.  
CC  
NC  
2C  
The ’LV11A devices perform the Boolean function  
9 10 11 12 13  
Y
A • B • C or Y  
A
B
C
in positive  
logic.  
These devices are fully specified for  
partial-power-downapplicationsusingI . TheI  
NC – No internal connection  
off  
off  
circuitry disables the outputs, preventing  
damaging current backflow through the devices  
when they are powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
Tube  
SN74LV11AD  
SOIC – D  
LV11A  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
SN74LV11ADR  
SN74LV11ANSR  
SN74LV11ADBR  
SN74LV11APWR  
SN74LV11ADGVR  
SNJ54LV11AJ  
SOP – NS  
74LV11A  
–40°C to 85°C  
SSOP – DB  
TSSOP – PW  
LV11A  
LV11A  
TVSOP – DGV Tape and reel  
LV11A  
CDIP – J  
CFP – W  
LCCC – FK  
Tube  
Tube  
Tube  
SNJ54LV11AJ  
SNJ54LV11AW  
SNJ54LV11AFK  
–55°C to 125°C  
SNJ54LV11AW  
SNJ54LV11AFK  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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