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SNJ54HC245FKR PDF预览

SNJ54HC245FKR

更新时间: 2024-11-02 13:13:51
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路输出元件
页数 文件大小 规格书
20页 701K
描述
HC/UH SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, CQCC20, HERMETIC SEALED, CERAMIC, LCC-20

SNJ54HC245FKR 技术参数

生命周期:Obsolete零件包装代码:QLCC
包装说明:QCCN,针数:20
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.55其他特性:WITH DIRECTION CONTROL
系列:HC/UHJESD-30 代码:S-CQCC-N20
长度:8.89 mm负载电容(CL):150 pF
逻辑集成电路类型:BUS TRANSCEIVER位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装形状:SQUARE
封装形式:CHIP CARRIER传播延迟(tpd):200 ns
认证状态:Not Qualified筛选级别:MIL-PRF-38535
座面最大高度:2.03 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
宽度:8.89 mmBase Number Matches:1

SNJ54HC245FKR 数据手册

 浏览型号SNJ54HC245FKR的Datasheet PDF文件第2页浏览型号SNJ54HC245FKR的Datasheet PDF文件第3页浏览型号SNJ54HC245FKR的Datasheet PDF文件第4页浏览型号SNJ54HC245FKR的Datasheet PDF文件第5页浏览型号SNJ54HC245FKR的Datasheet PDF文件第6页浏览型号SNJ54HC245FKR的Datasheet PDF文件第7页 
SN54HC245, SN74HC245  
OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCLS131D − DECEMBER 1982 − REVISED AUGUST 2003  
D
D
D
Wide Operating Voltage Range of 2 V to 6 V  
D
D
D
Typical t = 12 ns  
pd  
High-Current 3-State Outputs Drive Bus  
Lines Directly or Up To 15 LSTTL Loads  
6-mA Output Drive at 5 V  
Low Input Current of 1 μA Max  
Low Power Consumption, 80-μA Max I  
CC  
SN54HC245 . . . J OR W PACKAGE  
SN74HC245 . . . DB, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
SN54HC245 . . . FK PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DIR  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
VCC  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
3
2
1
20 19  
18  
B1  
B2  
B3  
B4  
B5  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
15  
14  
9 10 11 12 13  
GND  
description/ordering information  
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The  
control-function implementation minimizes external timing requirements.  
The devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on  
the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the  
device so that the buses are effectively isolated.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
PDIP − N  
Tube of 20  
Tube of 25  
Reel of 2000  
Reel of 2000  
Reel of 2000  
Tube of 70  
Reel of 2000  
Reel of 250  
Tube of 20  
Tube of 85  
Tube of 55  
SN74HC245N  
SN74HC245N  
SN74HC245DW  
SN74HC245DWR  
SN74HC245NSR  
SN74HC245DBR  
SN74HC245PW  
SN74HC245PWR  
SN74HC245PWT  
SNJ54HC245J  
SOIC − DW  
HC245  
SOP − NS  
HC245  
HC245  
−40°C to 85°C  
SSOP − DB  
TSSOP − PW  
HC245  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54HC245J  
SNJ54HC245W  
SNJ54HC245FK  
−55°C to 125°C  
SNJ54HC245W  
SNJ54HC245FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright © 2003, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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