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SNJ54AS823AJT PDF预览

SNJ54AS823AJT

更新时间: 2024-10-01 11:06:27
品牌 Logo 应用领域
德州仪器 - TI 驱动逻辑集成电路触发器总线驱动器总线收发器
页数 文件大小 规格书
7页 114K
描述
具有三态输出的 9 位总线接口触发器 | JT | 24 | -55 to 125

SNJ54AS823AJT 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP24,.3针数:24
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:1.63
其他特性:WITH CLEAR AND CLOCK ENABLE控制类型:INDEPENDENT CONTROL
计数方向:UNIDIRECTIONAL系列:AS
JESD-30 代码:R-GDIP-T24JESD-609代码:e0
长度:32.005 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.048 A
位数:9功能数量:1
端口数量:2端子数量:24
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP24,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED最大电源电流(ICC):103 mA
Prop。Delay @ Nom-Sup:14 ns传播延迟(tpd):14 ns
认证状态:Not Qualified筛选级别:MIL-PRF-38535
座面最大高度:5.08 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
技术:TTL温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED翻译:N/A
触发器类型:POSITIVE EDGE宽度:7.62 mm
Base Number Matches:1

SNJ54AS823AJT 数据手册

 浏览型号SNJ54AS823AJT的Datasheet PDF文件第2页浏览型号SNJ54AS823AJT的Datasheet PDF文件第3页浏览型号SNJ54AS823AJT的Datasheet PDF文件第4页浏览型号SNJ54AS823AJT的Datasheet PDF文件第5页浏览型号SNJ54AS823AJT的Datasheet PDF文件第6页浏览型号SNJ54AS823AJT的Datasheet PDF文件第7页 
SN54AS823A, SN74AS823A, SN74AS824A  
9-BIT BUS-INTERFACE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SDAS231A – JUNE 1984 – REVISED AUGUST 1995  
SN54AS823A . . . JT PACKAGE  
SN74AS823A . . . DW OR NT PACKAGE  
(TOP VIEW)  
Functionally Equivalent to AMD’s AM29823  
and AM29824  
Provide Extra Data Width Necessary for  
Wider Address/Data Paths or Buses With  
Parity  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
24  
23 1Q  
22 2Q  
21 3Q  
20 4Q  
19 5Q  
18 6Q  
17 7Q  
16 8Q  
15 9Q  
14 CLKEN  
13 CLK  
Outputs Have Undershoot-Protection  
Circuitry  
Power-Up High-Impedance State  
Buffered Control Inputs to Reduce  
dc Loading Effects  
Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK), and Standard Plastic  
(NT) and Ceramic (JT) 300-mil DIPs  
9D 10  
CLR 11  
GND 12  
description  
SN54AS823A . . . FK PACKAGE  
(TOP VIEW)  
These 9-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. These devices  
are particularly suitable for implementing wider  
buffer registers, I/O ports, bidirectional bus  
drivers, parity bus interfacing, and working  
registers.  
4
3
2
1
28 27 26  
25  
3D  
4D  
5D  
NC  
6D  
7D  
8D  
3Q  
4Q  
5Q  
NC  
6Q  
7Q  
8Q  
5
24  
23  
22  
21  
20  
19  
6
7
With the clock-enable (CLKEN) input low, the nine  
D-type edge-triggered flip-flops enter data on the  
low-to-high transitions of the clock (CLK) input.  
Taking CLKEN high disables the clock buffer,  
latching the outputs. The SN54AS823A and  
SN74AS823A have noninverting data (D) inputs  
and the SN74AS824A has inverting (D) inputs.  
Taking the clear (CLR) input low causes the nine  
Q outputs to go low independently of the clock.  
8
9
10  
11  
12 13 14 15 16 17 18  
SN74AS824A . . . DW OR NT PACKAGE  
(TOP VIEW)  
A buffered output-enable (OE) input can be used  
to place the nine outputs in either a normal logic  
state (high or low logic level) or the high-  
impedance state. In the high-impedance state, the  
outputs neither load nor drive the bus lines  
significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without interface or pullup components.  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
1
2
3
4
5
6
7
8
9
24  
V
CC  
23 1Q  
22 2Q  
21 3Q  
20 4Q  
19 5Q  
18 6Q  
17 7Q  
16 8Q  
15 9Q  
14 CLKEN  
13 CLK  
OE does not affect the internal operation of the  
flip-flops. Old data can be retained or new data  
can be entered while the outputs are in the  
high-impedance state.  
9D 10  
CLR 11  
GND 12  
The SN54AS823A is characterized for operation  
over the full military temperature range of 55°C  
to 125°C. The SN74AS823A and SN74AS824A  
are characterized for operation from 0°C to 70°C.  
NC – No internal connection  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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