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SNJ54ACT574W

更新时间： 2024-09-09 05:04:39
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路输出元件
页数 文件大小 规格书
15页 526K
描述
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

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SNJ54ACT574W 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：DFP, FL20,.3针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.29Is Samacsys：N
其他特性：BROADSIDE VERSION OF 374系列：ACT
JESD-30 代码：R-GDFP-F20长度：13.09 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：70000000 Hz最大I（ol）：0.024 A
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DFP
封装等效代码：FL20,.3封装形状：RECTANGULAR
封装形式：FLATPACK包装方法：TUBE
电源：5 V传播延迟（tpd）：13.5 ns
认证状态：Not Qualified筛选级别：MIL-PRF-38535
座面最大高度：2.45 mm子类别：FF/Latches
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL触发器类型：POSITIVE EDGE
宽度：6.92 mmBase Number Matches：1

SNJ54ACT574W 数据手册

 浏览型号SNJ54ACT574W的Datasheet PDF文件第2页浏览型号SNJ54ACT574W的Datasheet PDF文件第3页浏览型号SNJ54ACT574W的Datasheet PDF文件第4页浏览型号SNJ54ACT574W的Datasheet PDF文件第5页浏览型号SNJ54ACT574W的Datasheet PDF文件第6页浏览型号SNJ54ACT574W的Datasheet PDF文件第7页 
SN54ACT574, SN74ACT574  
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCAS537D – OCTOBER 1995 – REVISED NOVEMBER 2002  
SN54ACT574 . . . J OR W PACKAGE  
SN74ACT574 . . . DB, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
4.5-V to 5.5-V V  
Operation  
CC  
Inputs Accept Voltages to 5.5 V  
Max t of 9 ns at 5 V  
pd  
Inputs Are TTL-Voltage Compatible  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
CLK  
description/ordering information  
These 8-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. The devices  
are particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
GND  
The eight flip-flops of the ’ACT574 devices are  
D-type edge-triggered flip-flops. On the positive  
transition of the clock (CLK) input, the Q outputs  
are set to the logic levels set up at the data (D)  
inputs.  
SN54ACT574 . . . FK PACKAGE  
(TOP VIEW)  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or the  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
the increased drive provide the capability to drive  
bus lines in a bus-organized system without need  
for interface or pullup components.  
3
2
1
20 19  
18  
4
5
6
7
8
3D  
4D  
5D  
6D  
7D  
2Q  
3Q  
4Q  
5Q  
6Q  
17  
16  
15  
14  
9 10 11 12 13  
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP – N  
Tube  
SN74ACT574N  
SN74ACT574N  
Tube  
SN74ACT574DW  
SN74ACT574DWR  
SN74ACT574NSR  
SN74ACT574DBR  
SN74ACT574PWR  
SNJ54ACT574J  
SOIC – DW  
ACT574  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
–40°C to 85°C  
SOP – NS  
SSOP – DB  
TSSOP – PW  
CDIP – J  
ACT574  
AD574  
AD574  
SNJ54ACT574J  
SNJ54ACT574W  
SNJ54ACT574FK  
–55°C to 125°C  
CFP – W  
Tube  
SNJ54ACT574W  
SNJ54ACT574FK  
LCCC – FK  
Tube  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...15

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