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SNJ54AC574W PDF预览

SNJ54AC574W

更新时间: 2024-11-20 05:04:39
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
16页 529K
描述
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

SNJ54AC574W 数据手册

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ꢈ ꢅꢉꢄꢊ ꢋꢌꢉ ꢍꢎ ꢏ ꢏꢋ ꢐꢏ ꢌꢉꢑ ꢒꢐ ꢐꢏ ꢑꢏꢋ ꢓ ꢊꢒ ꢎ ꢌꢓ ꢊꢈ ꢎ  
SCAS541E − OCTOBER 1995 − REVISED OCTOBER 2003  
SN54AC574 . . . J OR W PACKAGE  
SN74AC574 . . . DB, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
2-V to 6-V V  
Operation  
CC  
Inputs Accept Voltages to 6 V  
Max t of 8.5 ns at 5 V  
pd  
3-State Outputs Drive Bus Lines Directly  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
CLK  
description/ordering information  
These 8-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. The devices  
are particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
GND  
The eight flip-flops of the AC574 devices are  
D-type edge-triggered flip-flops. On the positive  
transition of the clock (CLK) input, the Q outputs  
are set to the logic levels set up at the data (D)  
inputs.  
SN54AC574 . . . FK PACKAGE  
(TOP VIEW)  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal  
logic state (high or low logic levels) or the  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
the increased drive provide the capability to drive  
bus lines in a bus-organized system without need  
for interface or pullup components.  
3
2
1
20 19  
18  
2Q  
3Q  
4Q  
5Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
17  
16  
15  
14 6Q  
9 10 11 12 13  
OE does not affect internal operations of the  
flip-flop. Old data can be retained or new data can  
be entered while the outputs are in the  
high-impedance state.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PDIP − N  
Tube  
SN74AC574N  
SN74AC574N  
Tube  
SN74AC574DW  
SN74AC574DWR  
SN74AC574NSR  
SN74AC574DBR  
SN74AC574PW  
SN74AC574PWR  
SNJ54AC574J  
SOIC − DW  
AC574  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP − NS  
AC574  
AC574  
−40°C to 85°C  
−55°C to 125°C  
SSOP − DB  
TSSOP − PW  
AC574  
Tape and reel  
Tube  
CDIP − J  
CFP − W  
LCCC − FK  
SNJ54AC574J  
SNJ54AC574W  
SNJ54AC574FK  
Tube  
SNJ54AC574W  
SNJ54AC574FK  
Tube  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢈ ꢙ ꢤ ꢜ ꢛꢧ ꢢꢡ ꢟꢠ ꢡꢛ ꢝꢤ ꢦꢘ ꢞꢙ ꢟ ꢟꢛ ꢮꢒ ꢊꢌ ꢎꢑ ꢓ ꢌꢖꢯꢂ ꢖꢂꢇ ꢞꢦꢦ ꢤꢞ ꢜ ꢞ ꢝꢣ ꢟꢣꢜ ꢠ ꢞ ꢜ ꢣ ꢟꢣ ꢠꢟꢣ ꢧ  
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢭ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢨ  
ꢢ ꢙꢦ ꢣꢠꢠ ꢛ ꢟꢩꢣ ꢜ ꢫꢘ ꢠꢣ ꢙ ꢛꢟꢣ ꢧꢨ ꢈ ꢙ ꢞꢦ ꢦ ꢛ ꢟꢩꢣ ꢜ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢠ ꢇ ꢤꢜ ꢛ ꢧꢢꢡ ꢟꢘꢛ ꢙ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SNJ54AC574W 替代型号

型号 品牌 替代类型 描述 数据表
5962-9677301QSA TI

完全替代

OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS

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