Datasheet > 驱动程序和接口 > 线路驱动器或接收器> SN75LVDS83A

SN75LVDS83A

更新时间： 2024-02-02 10:19:11

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
25页	781K
描述
FLATLINKâ¢ TRANSMITTER

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技术参数
数据手册
替代型号

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SN75LVDS83A 技术参数

是否无铅：	含铅	生命周期：	Obsolete
包装说明：	,	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.7	接口集成电路类型：	LINE DRIVER
最大接收延迟：		Base Number Matches：	1

SN75LVDS83A 数据手册

SN75LVDS83A

www.ti.com

SLLS980D –JUNE 2009–REVISED JUNE 2011

FLATLINK™ TRANSMITTER

Check for Samples: SN75LVDS83A

Low-Voltage Differential

Consumes Less Than 1mW When Disabled

Selectable Rising or Falling Clock Edge

Triggered Inputs

ESD: 5kV HBM

Support Spread Spectrum Clocking (SSC)

Compatible with all OMAP™2x, OMAP™3x,

and DaVinci™ Application Processors

FEATURES

•

LVDS Display Serdes Interfaces Directly to

LCD Display Panels with Integrated LVDS

Package Options: 8.1mm x 14mm TSSOP

3.3V Tolerant Data Inputs

Transfer Rate up to 100Mpps (Mega Pixel Per

Second); Pixel Clock Frequency Range 10MHz

to 100MHz

•

Suited for Display Resolutions Ranging From

HVGA up to HD With Low EMI

Operates From a Single 3.3V Supply and

170mW (typ.) at 75MHz

28 Data Channels Plus Clock In Low-Voltage

TTL to 4 Data Channels Plus Clock Out

APPLICATIONS

•

LCD Display Panel Driver

UMPC and Netbook PC

Digital Picture Frame

DESCRIPTION

The SN75LVDS83A FlatLink™ transmitter contains four 7-bit parallel-load serial-out shift registers, a 7X clock

synthesizer, and five Low-Voltage Differential Signaling (LVDS) line drivers in a single integrated circuit. These

functions allow 28 bits of single-ended LVTTL data to be synchronously transmitted over five balanced-pair

conductors for receipt by a compatible receiver, such as the SN75LVDS82 and LCD panels with integrated LVDS

receiver.

When transmitting, data bits D0 through D27 are each loaded into registers upon the edge of the input clock

signal (CLKIN). The rising or falling edge of the clock can be selected via the clock select (CLKSEL) pin. The

frequency of CLKIN is multiplied seven times, and then used to unload the data registers in 7-bit slices and

serially. The four serial streams and a phase-locked clock (CLKOUT) are then output to LVDS output drivers.

The frequency of CLKOUT is the same as the input clock, CLKIN.

Application

processor

SN75LVDS83A

FlatLink^TMTransmitter

(e.g. OMAP^TM

)

TSSOP: 8 x 14mm DGG

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

OMAP, DaVinci, FlatLink are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...25

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SN75LVDS83A 替代型号

型号	品牌	替代类型	描述	数据表
SN75LVDS83C	TI	功能相似	FLATLINKâ¢ TRANSMITTER

与SN75LVDS83A相关器件

型号	品牌	获取价格	描述	数据表
SN75LVDS83ADGG	TI	获取价格	FLATLINKâ¢ TRANSMITTER
SN75LVDS83ADGGR	TI	获取价格	FLATLINKâ¢ TRANSMITTER
SN75LVDS83AZQLR	TI	获取价格	IC LINE DRIVER, PBGA56, LEAD FREE, PLASTIC, BGA-56, Line Driver or Receiver
SN75LVDS83B	TI	获取价格	FLATLINK™ TRANSMITTER
SN75LVDS83B_17	TI	获取价格	FlatLink Transmitter
SN75LVDS83BDGG	TI	获取价格	FLATLINK™ TRANSMITTER
SN75LVDS83BDGGR	TI	获取价格	FLATLINK™ TRANSMITTER
SN75LVDS83BZQLR	TI	获取价格	FLATLINK™ TRANSMITTER
SN75LVDS83C	TI	获取价格	FLATLINKâ¢ TRANSMITTER
SN75LVDS83C_17	TI	获取价格	FLATLINK TRANSMITTER

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