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SN75LVDM977 PDF预览

SN75LVDM977

更新时间： 2024-11-19 22:16:11
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
28页 426K
描述
9-CHANNEL DUAL-MODE TRANSCEIVERS

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SN75LVDM977 数据手册

 浏览型号SN75LVDM977的Datasheet PDF文件第2页浏览型号SN75LVDM977的Datasheet PDF文件第3页浏览型号SN75LVDM977的Datasheet PDF文件第4页浏览型号SN75LVDM977的Datasheet PDF文件第5页浏览型号SN75LVDM977的Datasheet PDF文件第6页浏览型号SN75LVDM977的Datasheet PDF文件第7页 
SN75LVDM976, SN75LVDM977  
9-CHANNEL DUAL-MODE TRANSCEIVERS  
SLLS292B – APRIL 1998 – REVISED JANUARY 2000  
DGG PACKAGE  
(TOP VIEW)  
9 Channels for the Data and Control Paths  
of the Small Computer Systems Interface  
(SCSI)  
INV/NON  
GND  
CDE2  
CDE1  
CDE0  
9B+  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
Supports Single-Ended and Low-Voltage  
Differential (LVD) SCSI  
2
GND  
3
CMOS Input Levels (’LVDM976) or TTL  
Input Levels (’LVDM977) Available  
1A  
4
1DE/RE  
2A  
9B–  
5
Includes DIFFSENS Comparators on CDE0  
8B+  
6
2DE/RE  
3A  
8B–  
7
Single-Ended Receivers Include Noise  
Pulse Rejection Circuitry  
7B+  
8
3DE/RE  
4A  
7B–  
9
Packaged in Thin Shrink Small-Outline  
Package With 20-Mil Terminal Pitch  
6B+  
10  
11  
12  
4DE/RE  
6B–  
Low Disabled Supply Current 7 mA  
Maximum  
V
V
CC  
CC  
GND 13  
44 GND  
Power-Up/Down Glitch Protection  
GND 14  
43 GND  
Bus is High-Impedance With V  
= 1.5 V  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
GND  
GND  
GND  
GND  
GND  
GND  
CC  
Pin-Compatible With the SN75976ADGG  
High-Voltage Differential Transceiver  
V
V
CC  
5A  
CC  
description  
5B+  
5B–  
4B+  
4B–  
3B+  
3B–  
2B+  
2B–  
1B+  
1B–  
5DE/RE  
6A  
The SN75LVDM976 and SN75LVDM977 have  
nine transceivers for transmitting or receiving the  
signals to or from a SCSI data bus. They offer  
electrical compatibility to both the single-ended  
signaling of X3.277:1996–SCSI–3 Parallel Inter-  
face (Fast–20) and the new low-voltage differen-  
tial signaling method of proposed standard  
1142–D SCSI Parallel Interface – 2 (SPI–2).  
6DE/RE  
7A  
7DE/RE  
8A  
8DE/RE  
9A  
9DE/RE  
The differential drivers are nonsymmetrical. The  
SCSI bus uses a dc bias on the line to allow  
terminated fail safe and wired-OR signaling. This bias can be as high as 125 mV and induces a difference in  
the high-to-low and low-to-high transition times of a symmetrical driver. In order to reduce pulse skew, an LVD  
SCSI driver’s output characteristics become nonsymmetrical. In other words, there is more assertion current  
than negation current to or from the driver. This allows the actual differential signal voltage on the bus to be  
symmetrical about 0 V. Even though the driver output characteristics are nonsymmetrical, the design of the  
’LVDM976 drivers maintains balanced signaling. Balanced means that the current that flows in each signal line  
is nearly equal but opposite in direction and is one of the keys to the low-noise performance of a differential bus.  
AVAILABLE OPTIONS  
PACKAGE  
TSSOP  
(DGG)  
TSSOP  
(DGG)  
T
A
CMOS INPUT LEVELS  
TTL INPUTS LEVELS  
SN75LVDM976DGG  
SN75LVDM976DGGR  
SN75LVDM977DGG  
SN75LVDM977DGGR  
0°C to 70°C  
†
†
†
The R suffix designates a taped and reeled package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...28

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