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SN75LVDM976DLG4 PDF预览

SN75LVDM976DLG4

更新时间： 2024-11-20 15:52:27
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
26页 299K
描述
9 LINE TRANSCEIVER, PDSO56, GREEN, PLASTIC, SSOP-56

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SN75LVDM976DLG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：SSOP, SSOP56,.4针数：56
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.83
其他特性：SUPPORTS SINGLE-ENDED AND LOW-VOLTAGE DIFFERENTIAL SCSI差分输出：YES
驱动器位数：9高电平输入电流最大值：0.00005 A
输入特性：DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型：LINE TRANSCEIVER
接口标准：X3.277; SCSI-2; SCSI-3JESD-30 代码：R-PDSO-G56
JESD-609代码：e4长度：18.415 mm
湿度敏感等级：2功能数量：9
端子数量：56最高工作温度：70 °C
最低工作温度：最小输出摆幅：0.2 V
最大输出低电流：0.002 A封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP56,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：5 V
认证状态：Not Qualified最大接收延迟：10 ns
接收器位数：9座面最大高度：2.79 mm
子类别：Line Driver or Receivers最大压摆率：26 mA
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED最大传输延迟：8.8 ns
宽度：7.5 mmBase Number Matches：1

SN75LVDM976DLG4 数据手册

 浏览型号SN75LVDM976DLG4的Datasheet PDF文件第2页浏览型号SN75LVDM976DLG4的Datasheet PDF文件第3页浏览型号SN75LVDM976DLG4的Datasheet PDF文件第4页浏览型号SN75LVDM976DLG4的Datasheet PDF文件第5页浏览型号SN75LVDM976DLG4的Datasheet PDF文件第6页浏览型号SN75LVDM976DLG4的Datasheet PDF文件第7页 
SN75LVDM976  
SN75LVDM977  
www.ti.com  
SLLS292B–APRIL 1998–REVISED JANUARY 2000  
9-CHANNEL DUAL-MODE TRANSCEIVERS  
FEATURES  
DGG PACKAGE  
(TOP VIEW)  
•
•
•
9 Channels for the Data and Control Paths of  
the Small Computer Systems Interface (SCSI)  
INV/NON  
GND  
CDE2  
CDE1  
CDE0  
9B+  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
Supports Single-Ended and Low-Voltage  
Differential (LVD) SCSI  
2
GND  
3
CMOS Input Levels ('LVDM976) or TTL Input  
Levels ('LVDM977) Available  
1A  
4
1DE/RE  
2A  
9B–  
5
•
•
Includes DIFFSENS Comparators on CDE0  
8B+  
6
Single-Ended Receivers Include Noise Pulse  
Rejection Circuitry  
2DE/RE  
3A  
8B–  
7B+  
7
8
•
Packaged in Thin Shrink Small-Outline  
Package With 20-Mil Terminal Pitch  
3DE/RE  
4A  
7B–  
6B+  
9
10  
11  
12  
•
•
•
•
Low Disabled Supply Current 7 mA Maximum  
Power-Up/Down Glitch Protection  
4DE/RE  
6B–  
V
V
CC  
CC  
GND 13  
44 GND  
Bus is High-Impedance With VCC = 1.5 V  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
GND  
Pin-Compatible With the SN75976ADGG  
High-Voltage Differential Transceiver  
DESCRIPTION  
V
CC  
V
CC  
The SN75LVDM976 and SN75LVDM977 have nine  
transceivers for transmitting or receiving the signals  
to or from a SCSI data bus. They offer electrical  
compatibility to both the single-ended signaling of  
X3.277:1996-SCSI-3 Parallel Interface (Fast-20) and  
the new low-voltage differential signaling method of  
proposed standard 1142-D SCSI Parallel Interface –  
2 (SPI-2).  
5A  
5DE/RE  
6A  
5B+  
5B–  
4B+  
4B–  
3B+  
3B–  
2B+  
2B–  
1B+  
1B–  
6DE/RE  
7A  
7DE/RE  
8A  
8DE/RE  
9A  
9DE/RE  
The differential drivers are nonsymmetrical. The SCSI  
bus uses a dc bias on the line to allow terminated fail  
safe and wired-OR signaling. This bias can be as  
high as 125 mV and induces a difference in the  
high-to-low and low-to-high transition times of a  
symmetrical driver. In order to reduce pulse skew, an  
LVD SCSI driver's output characteristics become  
nonsymmetrical. In other words, there is more  
assertion current than negation current to or from the  
driver. This allows the actual differential signal  
voltage on the bus to be symmetrical about 0 V. Even  
though the driver output characteristics are  
nonsymmetrical, the design of the 'LVDM976 drivers  
maintains balanced signaling. Balanced means that  
the current that flows in each signal line is nearly  
equal but opposite in direction and is one of the keys  
to the low-noise performance of a differential bus.  
AVAILABLE OPTIONS  
PACKAGE  
TSSOP (DGG)  
TTL INPUTS  
LEVELS  
TA  
TSSOP (DGG)  
CMOS INPUT LEVELS  
0°C to  
70°C  
SN75LVDM976DGG  
SN75LVDM977DGG  
SN75LVDM976DGGR(1) SN75LVDM977DGGR(1)  
(1) The R suffix designates a taped and reeled package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1998–2000, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...26

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SN75LVDM976DLG4 替代型号

型号 品牌 替代类型 描述 数据表
SN75976A1DGGR TI

功能相似

 9-CHANNEL DIFFERENTIAL TRANSCEIVER
SN75976A1DGG TI

功能相似

 9-CHANNEL DIFFERENTIAL TRANSCEIVER

与SN75LVDM976DLG4相关器件

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SN75LVDM976DLR TI

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 		暂无描述
SN75LVDM976DLRG4 TI

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 		9 LINE TRANSCEIVER, PDSO56, GREEN, PLASTIC, SSOP-56
SN75LVDM977 TI

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 		9-CHANNEL DUAL-MODE TRANSCEIVERS
SN75LVDM977CDGGR TI

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 		9 LINE TRANSCEIVER, PDSO56
SN75LVDM977CDLR TI

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 		9 LINE TRANSCEIVER, PDSO56
SN75LVDM977DGG TI

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 		9-CHANNEL DUAL-MODE TRANSCEIVERS
SN75LVDM977DGGG4 TI

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 		9-Channel LVD-SCSI Transceiver 56-TSSOP 0 to 70
SN75LVDM977DGGR TI

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 		9-CHANNEL DUAL-MODE TRANSCEIVERS
SN75LVDM977DGGRG4 TI

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 		9 LINE TRANSCEIVER, PDSO56, 0.50 MM PITCH, PLASTIC, TSSOP-56
SN75LVDM977DLG4 TI

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 		9 LINE TRANSCEIVER, PDSO56, GREEN, PLASTIC, SSOP-56

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