SN65LBC180, SN75LBC180
LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS
SLLS174B – FEBRUARY 1994 – REVISED JANUARY 2000
Designed for High-Speed Multipoint Data
Transmission Over Long Cables
D OR N PACKAGE
(TOP VIEW)
Operate With Pulse Durations as Low
as 30 ns
NC
V
V
A
B
Z
Y
1
2
3
4
5
6
7
14
13
12
11
10
9
CC
CC
R
RE
Low Supply Current . . . 5 mA Max
Meet or Exceed the Requirements of ANSI
Standard RS-485 and ISO 8482:1987(E)
DE
D
3-State Outputs for Party-Line Buses
GND
GND
8
NC
Common-Mode Voltage Range of
–7 V to 12 V
NC–No internal connection
Thermal Shutdown Protection Prevents
Driver Damage From Bus Contention
Function Tables
Positive and Negative Output Current
Limiting
DRIVER
INPUT
ENABLE
OUTPUTS
Pin Compatible With the SN75ALS180
D
H
L
DE
H
H
Y
H
L
Z
L
H
Z
description
X
L
Z
The SN65LBC180 and SN75LBC180 differential
driver and receiver pairs are monolithic integrated
circuits designed for bidirectional data
communication over long cables that take on the
characteristics of transmission lines. They are
balanced, or differential, voltage mode devices
that meet or exceed the requirements of industry
standards ANSI RS-485 and ISO 8482:1987(E).
Both devices are designed using TI’s proprietary
LinBiCMOS with the low power consumption of
CMOS and the precision and robustness of
bipolar transistors in the same circuit.
RECEIVER
DIFFERENTIAL INPUTS
A–B
ENABLE
OUTPUT
RE
L
L
L
H
L
R
H
?
L
Z
H
V
≥ 0.2 V
ID
–0.2 V < V < 0.2 V
ID
≤ – 0.2 V
X
V
ID
Open circuit
H = high level, L = low level, ? = indeterminate, X = irrelevant,
Z = high impedance (off)
†
logic symbol
Both the SN65LBC180 and SN75LBC180
combine a differential line driver and receiver with
3-state outputs and operate from a single 5-V
supply. The driver and receiver have active-high
and active-low enables, respectively, which can
be externally connected to function as a direction
control. The driver differential outputs and the
receiver differential inputs are connected to
separate terminals for full-duplex operation and
are designed to present minimum loading to the
4
5
9
DE
D
EN1
Y
Z
1
1
10
3
2
12
11
RE
R
EN2
2
A
B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
logic diagram (positive logic)
bus whether disabled or powered off (V
= 0).
CC
4
These parts feature a wide common-mode
voltage range making them suitable for
point-to-point or multipoint data-bus applications.
DE
9
5
Y
Z
D
10
3
2
RE
12
11
A
B
R
LinBiCMOS is a trademark of Texas Instruments Incorporated.
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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