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SN75LBC175ANR PDF预览

SN75LBC175ANR

更新时间： 2024-02-06 07:30:29
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
10页 159K
描述
QUAD LINE RECEIVER, PDIP16, ROHS COMPLIANT, PLASTIC, MS-001BB, DIP-16

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SN75LBC175ANR 技术参数

生命周期：Obsolete零件包装代码：DIP
包装说明：ROHS COMPLIANT, PLASTIC, MS-001BB, DIP-16针数：16
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.49
Is Samacsys：N差分输出：NO
驱动器位数：4输入特性：DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型：LINE RECEIVER接口标准：EIA-422; TIA-422; EIA-485; TIA-485; ISO 8482
JESD-30 代码：R-PDIP-T16JESD-609代码：e4
长度：19.305 mm功能数量：4
端子数量：16最高工作温度：70 °C
最低工作温度：最大输出低电流：0.008 A
封装主体材料：PLASTIC/EPOXY封装代码：DIP
封装等效代码：DIP16,.3封装形状：RECTANGULAR
封装形式：IN-LINE电源：5 V
认证状态：Not Qualified最大接收延迟：16 ns
接收器位数：4座面最大高度：5.08 mm
子类别：Line Driver or Receivers最大压摆率：20 mA
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：NO
技术：BICMOS温度等级：COMMERCIAL
端子面层：NICKEL PALLADIUM GOLD端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
宽度：7.62 mmBase Number Matches：1

SN75LBC175ANR 数据手册

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SN65LBC175, SN75LBC175  
QUADRUPLE LOW-POWER DIFFERENTIAL LINE RECEIVERS  
SLLS171C – OCTOBER 1993 – REVISED APRIL 2000  
Meet or Exceed the EIA Standards  
RS-422-A, RS-423-A, RS-485, and CCITT  
Recommendation V.11  
D OR N PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
1B  
1A  
Designed to Operate With Pulse Durations  
as Short as 20 ns  
CC  
4B  
4A  
1Y  
Designed for Multipoint Transmission on  
Long Bus Lines in Noisy Environments  
4Y  
1,2EN  
2Y  
3,4EN  
3Y  
Input Sensitivity . . . ±200 mV  
2A  
Low-Power Consumption . . . 20 mA Max  
Open-Circuit Fail-Safe Design  
3A  
2B  
3B  
GND  
Common-Mode Input Voltage Range of  
–7 V to 12 V  
†
logic symbol  
Pin Compatible With SN75175 and MC3486  
4
EN  
1,2EN  
description  
2
1
6
7
3
5
1A  
1B  
2A  
2B  
The SN65LBC175 and SN75LBC175 are  
monolithic, quadruple, differential line receivers  
with 3-state outputs and are designed to meet the  
requirements of the EIA standards RS-422-A,  
RS-423-A, RS-485, andCCITTRecommendation  
V.11. The devices are optimized for balanced  
multipointbustransmissionatdataratesuptoand  
exceeding 10 million bits per second. The  
receivers are enabled in pairs, with an active-high  
enable input. Each differential receiver input  
features high impedance, hysteresis for  
increased noise immunity, and sensitivity of  
±200 mV over a common-mode input voltage  
range of 12 V to –7 V. The fail-safe design ensures  
that when the inputs are open-circuited, the  
outputs are always high. Both devices are  
designed using the TI proprietary LinBiCMOS  
technology allowing low power consumption, high  
switching speeds, and robustness.  
1Y  
2Y  
12  
EN  
3,4EN  
10  
9
11  
13  
3A  
3B  
4A  
4B  
3Y  
4Y  
14  
15  
†
This symbol is in accordance with ANSI/IEEE Std 91-1984  
and IEC Publication 617-12.  
logic diagram (positive logic)  
4
1,2EN  
These devices offer optimum performance when  
used with the SN75LBC172 or SN75LBC174  
quadruple line drivers. The SN65LBC175 and  
SN75LBC175 are available in the 16-pin DIP (N)  
2
1A  
3
5
1
1Y  
2Y  
1B  
6
2A  
and small-outline inline circuit (SOIC)  
packages.  
D
7
2B  
The SN65LBC175 is characterized over the  
industrial temperature range of –40°C to 85°C.  
The SN75LBC175 is characterized for operation  
over the commercial temperature range of 0°C  
to 70°C.  
12  
3,4EN  
10  
3A  
9
11  
13  
3Y  
4Y  
3B  
14  
4A  
15  
4B  
LinBiCMOS is a trademark of Texas Instruments Incorporated.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

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