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SN75DP129RHHRG4 PDF预览

SN75DP129RHHRG4

更新时间: 2024-11-05 03:36:55
品牌 Logo 应用领域
德州仪器 - TI 消费电路商用集成电路
页数 文件大小 规格书
28页 882K
描述
DisplayPort to TMDS Translator

SN75DP129RHHRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN,针数:36
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.12商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:S-PQCC-N36JESD-609代码:e4
长度:6 mm湿度敏感等级:3
功能数量:1端子数量:36
最高工作温度:85 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V表面贴装:YES
温度等级:OTHER端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6 mmBase Number Matches:1

SN75DP129RHHRG4 数据手册

 浏览型号SN75DP129RHHRG4的Datasheet PDF文件第2页浏览型号SN75DP129RHHRG4的Datasheet PDF文件第3页浏览型号SN75DP129RHHRG4的Datasheet PDF文件第4页浏览型号SN75DP129RHHRG4的Datasheet PDF文件第5页浏览型号SN75DP129RHHRG4的Datasheet PDF文件第6页浏览型号SN75DP129RHHRG4的Datasheet PDF文件第7页 
SN75DP129  
www.ti.com  
SLAS583AJANUARY 2008REVISED MARCH 2008  
DisplayPort to TMDS Translator  
1
FEATURES  
APPLICATIONS  
Personal Computer Market  
DisplayPort Physical Layer Input Port to TMDS  
Physical Layer Output Port  
DP/TMDS Hardware Key (Dongle)  
Desktop PC  
Notebook PC  
Docking Station  
Standalone Video Card  
Integrated TMDS Level Translator With  
Receiver Equalization  
Supports Data Rates up to 2.5 Gbps  
Integrated I2C Logic Block for DVI / HDMI  
Connector Recognition  
Integrated Active I2C Buffer  
Enhanced ESD: 12 kV on all Pins  
Enhanced Commercial Temperature Range:  
0°C to 85°C  
36 Pin 6 × 6 QFN Package  
DESCRIPTION  
The SN75DP129 is a Dual-Mode DisplayPort input to Transition-Minimized Differential Signaling (TMDS) output.  
The TMDS output has a built-in level translator, compliant with Digital Visual Interface 1.0 (DVI) and High  
Definition Multimedia Interface 1.3 (HDMI) standards. The SN75DP129 is specified up to a maximum data rate of  
2.5 Gbps, supporting resolutions greater then 1920 x 1200 or HDTV 12-bit color depth at 1080p (progressive  
scan).  
An integrated Active I2C buffer isolates the capacitive loading of the source system from that of the sink and  
interconnecting cable. This isolation improves overall signal integrity of the system and provides greater design  
margin within the source system for DVI / HDMI compliance testing.  
A logic block was designed into the SN75DP129 to assist with TMDS connector identification. Through the use of  
the I2C_EN pin, this logic block can be enabled to indicate the translated port is an HDMI port; therefore legally  
supporting HDMI content.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2008, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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