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SN75C1167DBRE4 PDF预览

SN75C1167DBRE4

更新时间: 2024-11-05 03:54:07
品牌 Logo 应用领域
德州仪器 - TI 驱动器
页数 文件大小 规格书
16页 353K
描述
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS

SN75C1167DBRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SSOP, SSOP16,.3针数:16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.58
其他特性:RECEIVER 3-STATE OUTPUTS差分输出:YES
驱动器位数:2高电平输入电流最大值:0.000001 A
输入特性:DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型:LINE TRANSCEIVER
接口标准:EIA-422-B; TIA-422-B; V.11JESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:6.2 mm
湿度敏感等级:1功能数量:2
端子数量:16最高工作温度:70 °C
最低工作温度:最小输出摆幅:2 V
最大输出低电流:0.006 A封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP16,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:5 V
认证状态:Not Qualified最大接收延迟:27 ns
接收器位数:2座面最大高度:2 mm
子类别:Line Driver or Receivers最大压摆率:9 mA
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:BICMOS温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED最大传输延迟:12 ns
宽度:5.3 mmBase Number Matches:1

SN75C1167DBRE4 数据手册

 浏览型号SN75C1167DBRE4的Datasheet PDF文件第2页浏览型号SN75C1167DBRE4的Datasheet PDF文件第3页浏览型号SN75C1167DBRE4的Datasheet PDF文件第4页浏览型号SN75C1167DBRE4的Datasheet PDF文件第5页浏览型号SN75C1167DBRE4的Datasheet PDF文件第6页浏览型号SN75C1167DBRE4的Datasheet PDF文件第7页 
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SLLS159E − MARCH 1993 − REVISED NOVEMBER 2003  
SN65C1167 . . . DB OR NS PACKAGE  
SN75C1167 . . . DB, N, OR NS PACKAGE  
(TOP VIEW)  
D
Meet or Exceed Standards TIA/EIA-422-B  
and ITU Recommendation V.11  
D
BiCMOS Process Technology  
V
1B  
1A  
D
Low Supply-Current Requirements:  
9 mA Max  
1
2
3
4
5
6
7
8
16  
15  
14  
CC  
1D  
1Y  
1R  
D
D
D
D
Low Pulse Skew  
13 1Z  
12 DE  
RE  
2R  
Receiver Input Impedance . . . 17 kTyp  
Receiver Input Sensitivity . . . 200 mV  
11  
10  
9
2Z  
2Y  
2D  
2A  
Receiver Common-Mode Input Voltage  
Range of −7 V to 7 V  
2B  
GND  
D
Operate From Single 5-V Power Supply  
SN65C1168 . . . N, NS, OR PW PACKAGE  
SN75C1168 . . . DB, N, NS, OR PW PACKAGE  
(TOP VIEW)  
D
Glitch-Free Power-Up/Power-Down  
Protection  
D
D
Receiver 3-State Outputs Active-Low  
Enable for SN65C1167 and SN75C1167 Only  
V
1B  
1A  
1
2
3
4
5
6
7
8
16  
15  
14  
CC  
Improved Replacements for the MC34050  
and MC34051  
1D  
1Y  
1R  
13 1Z  
1DE  
2R  
description/ordering information  
12 2DE  
11  
10  
9
2Z  
2Y  
2D  
2A  
The SN65C1167, SN75C1167, SN65C1168,  
and SN75C1168 dual drivers and receivers are  
integrated circuits designed for balanced  
2B  
GND  
transmission  
lines.  
The  
devices  
meet  
TIA/EIA-422-B and ITU recommendation V.11.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
PDIP (N)  
Tube  
SN75C1167N  
SN75C1167N  
75C1167  
SOP (NS)  
SSOP (DB)  
PDIP (N)  
Tape and reel  
Tape and reel  
Tube  
SN75C1167NSR  
SN75C1167DBR  
SN75C1168N  
CA1167  
SN75C1168N  
75C1168  
0°C to 70°C  
SOP (NS)  
SSOP (DB)  
Tape and reel  
Tape and reel  
Tube  
SN75C1168NSR  
SN75C1168DBR  
SN75C1168PW  
SN75C1168PWR  
SN65C1167NSR  
SN65C1167DBR  
SN65C1168N  
CA1168  
TSSOP (PW)  
CA1168  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP (NS)  
SSOP (DB)  
PDIP (N)  
65C1167  
CB1167  
SN65C1168N  
65C1168  
−40°C to 85°C  
SOP (NS)  
Tape and reel  
Tube  
SN65C1168NSR  
SN65C1168PW  
SN65C1168PWR  
TSSOP (PW)  
CB1168  
Tape and reel  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
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ꢝ ꢜ ꢛ ꢖꢤ ꢛ ꢙꢤ ꢨ ꢛ ꢙꢙ ꢛ ꢖ ꢜꢩꢥ ꢓꢙ ꢘ ꢤꢟꢞ ꢜꢕꢘꢖ ꢡꢙ ꢘꢞ ꢠꢝ ꢝꢕ ꢖꢪ ꢤꢘꢠ ꢝ ꢖꢘꢜ ꢖꢠ ꢞꢠ ꢝꢝ ꢛꢙ ꢕꢣ ꢩ ꢕꢖꢞ ꢣꢟꢤ ꢠ  
ꢜ ꢠ ꢝ ꢜꢕ ꢖꢪ ꢘꢗ ꢛ ꢣꢣ ꢡꢛ ꢙ ꢛ ꢚ ꢠ ꢜ ꢠ ꢙ ꢝ ꢥ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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