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SN75ALS199

更新时间: 2024-11-24 04:31:15
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12页 180K
描述
QUADRUPLE DIFFERENTIAL LINE RECEIVER

SN75ALS199 数据手册

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SN75ALS199  
QUADRUPLE DIFFERENTIAL LINE RECEIVER  
SLLS046C – JANUARY 1989 – REVISED MAY 1995  
D OR N PACKAGE  
(TOP VIEW)  
Meets or Exceeds the Requirements of ITU  
Recommendations V.10, V.11, X.26, and  
X.27  
1B  
1A  
V
CC  
15 4B  
14 4A  
1
2
3
4
5
6
7
8
16  
Designed to Operate Up To 20 Mbaud  
–7 V to 7 V Common-Mode Input Voltage  
Range With 300-mV Sensitivity  
1Y  
13  
12  
11  
10  
9
1, 2EN  
2Y  
4Y  
3-State TTL-Compatible Outputs  
High Input Impedance . . . 12 kMin  
Input Hysteresis . . . 120 mV Typ  
Single 5-V Supply Operation  
3, 4EN  
3Y  
2A  
2B  
3A  
GND  
3B  
Low Supply Current Requirement  
35 mA Max  
Improved Speed and Power Consumption  
Compared to MC3486  
description  
The SN75ALS199 is a monolithic, quadruple line receiver with 3-state outputs designed using advanced,  
low-power, Schottky technology. This technology provides combined improvements in bar design, tooling  
production, and wafer fabrication, providing significantly less power consumption and permitting much higher  
data throughput than other designs. The device meets the specification of ITU Recommendations V.10, V.11,  
X.26, and X.27.  
The SN75ALS199 features 3-state outputs that permit direct connection to a bus-organized system with a  
fail-safe design that ensures the ouptuts will always be high if the inputs are open. The device is optimized for  
balanced multipoint bus transmission at rates up to 20 megabits per second. The input features high-input  
impedance, input hysteresis for increased noise immunity, and an input sensitivity of ±300 mV over a  
common-mode input voltage range of ±7 V. It also features an active-high enable function for each of two  
receiver pairs. The SN75ALS199 is designed for optimum performance when used with the SN75ALS194  
quadruple, differential line driver.  
The SN75ALS199 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each receiver)  
DIFFERENTIAL INPUTS  
A–B  
OUTPUT  
Y
EN  
V
0.3 V  
H
H
H
L
H
ID  
0.3 V < V < 0.3 V  
?
ID  
V
ID  
0.3 V  
X
L
Z
Open  
H
H
H
=
high level,  
L
=
low level,  
X
=
irrelevant,  
? = indeterminate, Z = high impedance (off)  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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