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SN75163B PDF预览

SN75163B

更新时间： 2024-11-24 12:21:43
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
9页 155K
描述
OCTAL GENERAL-PURPOSE INTERFACE US TRANSCEIVER

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中文翻译

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SN75163B 数据手册

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SLLS006A − D2611, OCTOBER 1985 − REVISED FEBRUARY 1993  
DW OR N PACKAGE  
(TOP VIEW)  
• 8-Channel Bidirectional Transceivers  
• Power-Up/Power-Down Protection  
(Glitch Free)  
TE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
1
2
3
4
5
6
7
8
9
10  
20 VCC  
• High-Speed Low-Power Schottky Circuitry  
19  
18  
17  
16  
15  
14  
13  
12  
11  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
D8  
PE  
• Low Power Dissipation . . . 66 mW Max Per  
Channel  
GPIB  
I/O Ports  
Terminal  
I/O Ports  
• High-impedance PNP Inputs  
• Receiver Hysteresis . . . 650 mV Typ  
• Open-Collector Driver Output Option  
• No Loading of Bus When Device Is  
Powered Down (V  
= 0)  
GND  
CC  
description  
The SN75163B octal general-purpose interface  
bus transceiver is a monolithic, high-speed, low-  
power Schottky device. It is designed for two-way  
NOT RECOMMENDED FOR NEW DESIGN  
data communications over single-ended transmission lines. The transceiver features driver outputs that can be  
operated in either the open-collector or 3-state modes. If talk enable (TE) is high, these outputs have the  
characteristics of open-collector outputs when pullup enable (PE) is low and of 3-state outputs when PE is high.  
Taking TE low places the outputs in the high-impedance state. The driver outputs are designed to handle loads  
of up to 48 mA of sink current. Each receiver features pnp transistor inputs for high input impedance and 400 mV  
of hysteresis for increased noise immunity.  
Output glitches during power up and power down are eliminated by an internal circuit that disables both the bus  
and receiver outputs. The outputs do not load the bus when V  
= 0.  
CC  
The SN75163B is characterized for operation from 0°C to 70°C.  
Function Tables  
EACH DRIVER  
EACH RECEIVER  
INPUTS  
INPUTS  
TE  
OUTPUT  
B
OUTPUT  
D
D
PE  
B
TE  
PE  
H
L
H
L
H
H
X
H
L
H
H
L
L
X
H
L
Z
L
Z
L
H
X
L
L
H
X
X
X
L
H
Z
X
H = high level, L = low level, X = irrelevant, Z = high-impedance state  
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Copyright 1993, Texas Instruments Incorporated  
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2−1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001  
1234567...9

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