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SN75160B_13 PDF预览

SN75160B_13

更新时间: 2024-09-26 12:27:39
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17页 917K
描述
OCTAL GENERAL-PURPOSE INTERFACE BUS TRANSCEIVER

SN75160B_13 数据手册

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SN75160B  
OCTAL GENERAL-PURPOSE  
INTERFACE BUS TRANSCEIVER  
SLLS004B – OCTOBER 1985 – REVISED MAY 1995  
Meets IEEE Standard 488-1978 (GPIB)  
8-Channel Bidirectional Transceiver  
DW OR N PACKAGE  
(TOP VIEW)  
Power-Up/Power-Down Protection  
(Glitch Free)  
TE  
B1  
VCC  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
D8  
PE  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
High-Speed, Low-Power Schottky Circuitry  
Low Power Dissipation . . . 72 mW Max Per  
Channel  
B2  
B3  
GPIB  
I/O Ports  
Fast Propagation Times . . . 22 ns Max  
High-Impedance pnp Inputs  
Terminal  
I/O Ports  
B4  
B5  
B6  
Receiver Hysteresis . . . 650 mV Typ  
Open-Collector Driver Output Option  
No Loading of Bus When Device Is  
B7  
B8  
GND  
Powered Down (V  
= 0)  
CC  
description  
The SN75160B 8-channel general-purpose interface bus (GPIB) transceiver is a monolithic, high-speed,  
low-power Schottky device designed for two-way data communications over single-ended transmission lines.  
It is designed to meet the requirements of IEEE Standard 488-1978. The transceiver features driver outputs that  
can be operated in either the passive-pullup or 3-state mode. If talk enable (TE) is high, these ports have the  
characteristics of passive-pullup outputs when pullup enable (PE) is low and of 3-state outputs when PE is high.  
Taking TE low places these ports in the high-impedance state. The driver outputs are designed to handle loads  
up to 48 mA of sink current.  
Output glitches during power up and power down are eliminated by an internal circuit that disables both the bus  
and receiver outputs. The outputs do not load the bus when V  
= 0. When combined with the SN75161B or  
CC  
SN75162B management bus transceivers, the pair provides the complete 16-wire interface for the IEEE-488  
bus.  
The SN75160B is characterized for operation from 0°C to 70°C.  
Function Tables  
EACH DRIVER  
INPUTS  
TE  
EACH RECEIVER  
INPUTS  
OUTPUT  
OUTPUT  
D
H
L
PE  
H
X
B
H
L
B
L
TE  
L
PE  
X
D
L
H
H
X
L
H
X
L
X
H
Z
H
X
L
Z
Z
H
X
X
H = high level, L = low level, X = irrelevant, Z = high impedance  
This is the high-impedance state of a normal 3-state output modified by the internal resistors  
to V and GND.  
CC  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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