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ꢇꢈꢉ ꢊꢋ ꢈꢌꢈꢋ ꢍꢋꢉ ꢊꢋꢈ ꢎꢏꢐꢉ ꢈꢎꢑ ꢉꢒ ꢓꢎ ꢀ ꢔꢕ ꢋ ꢖꢍ ꢓ
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SLLS026C − JANUARY 1987 − REVISED JULY 1990
N PACKAGE
(TOP VIEW)
• IEEE 802.3 1BASE5 Driver and Receiver
• On-Chip Receiver Squelch With Adjustable
Threshold
V
DRDLAJ
DRO +
DRO −
SQDLAJ
RXI +
1
2
3
4
5
6
7
8
16
CC
• Adjustable Squelch Delay
15 DATEN
• Direct TTL-Level Squelch Output
14
13
12
11
10
9
DRI
• Squelch Circuit Allows for External Noise
DLEN
RXO
Filtering
SQO
RXI −
• Two Driver-Enable Options
SQDLI
SQRXO
SQTHAJ
GND
• On-Chip Start-of-Idle Detection and Disable
• Driver Provides 2-V Minimum into a 50-Ω
Differential Load Allowing for Use With
Doubly-Terminated Lines and Multipoint
Architectures
• On-Chip Driver Slew-Rate Control for Very
Closely Matched Output Rise and Fall
Times
Function Tables
§
DRIVER
RECEIVER
INPUTS
DATEN DLEN DRO + DRO −
INPUTS
OUTPUTS
OUTPUTS
CONDITION
RXI +
RXI −
RXO
SQO
DRI
¶
No active signal
X
L
H
X
H
L
H
L
H
H
L
L
L
L
L
H
H
H
X
X
H
L
L
H
Z
H
L
Z
H
X
H
L
¶
Active signal
†
†
‡
H
L
L
H
‡
L
†
‡
This condition is valid during the time period set by DRDLAJ following a rising transition on DRI. Following this, when a
subsequent positive transition does not occur on DRI, the outputs go to the high-impedance state.
This condition is valid when it occurs within the enable time set by DRDLAJ after a rising transition on DRI. Otherwise, the
outputs are in the high-impedance state.
§
¶
Pins 9 and 10 are tied together.
An active signal is one that has an amplitude greater than the threshold level set by SQTHAJ.
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Copyright 1990, Texas Instruments Incorporated
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ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ
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2−1
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