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SN74VMEH22501A

更新时间： 2024-01-18 12:51:53
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
30页 568K
描述
8-BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1-BIT BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND 3-STATE OUTPUTS

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SN74VMEH22501A 数据手册

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SCES620 – DECEMBER 2004  
DGG OR DGV PACKAGE  
(TOP VIEW)  
D
D
Member of the Texas Instruments  
WidebusFamily  
UBTTransceiver Combines D-Type  
Latches and D-Type Flip-Flops for  
Operation in Transparent, Latched, or  
Clocked Modes  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OEBY  
1A  
1OEAB  
2
V
CC  
3
1Y  
1B  
4
GND  
2A  
2Y  
GND  
BIAS V  
2B  
D
OECCircuitry Improves Signal Integrity  
and Reduces Electromagnetic Interference  
(EMI)  
5
CC  
6
7
V
V
CC  
CC  
8
D
D
Compliant With VME64, 2eVME, and 2eSST  
Protocols  
2OEBY  
2OEAB  
3B1  
9
3A1  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
GND  
LE  
3A2  
3A3  
OE  
GND  
3A4  
CLKBA  
GND  
Bus Transceiver Split LVTTL Port Provides  
Feedback Path for Control and Diagnostics  
Monitoring  
V
CC  
3B2  
3B3  
D
D
D
D
I/O Interfaces Are 5-V Tolerant  
V
CC  
GND  
3B4  
CLKAB  
B-Port Outputs (−48 mA/64 mA)  
Y and A-Port Outputs (−12 mA/12 mA)  
I
, Power-Up 3-State, and BIAS V  
CC  
off  
Support Live Insertion  
V
V
CC  
CC  
3A5  
3A6  
GND  
3A7  
3A8  
DIR  
3B5  
3B6  
GND  
3B7  
3B8  
D
Bus Hold on 3A-Port Data Inputs  
D
26-W Equivalent Series Resistor on  
3A Ports and Y Outputs  
D
D
D
D
Flow-Through Architecture Facilitates  
Printed Circuit Board Layout  
V
CC  
Distributed V  
High-Speed Switching Noise  
and GND Pins Minimize  
CC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
T
A
PACKAGE  
TSSOP − DGG Tape and reel  
SN74VMEH22501ADGGR  
SN74VMEH22501ADGVR  
SN74VMEH22501AGQLR  
VMEH22501A  
VK501A  
TVSOP − DGV  
VFBGA − GQL  
Tape and reel  
Tape and reel  
−40°C to 85°C  
VK501A  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Motorola is a trademark of Motorola, Inc.  
OEC, UBT, and Widebus are trademarks of Texas Instruments.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...30

中文翻译

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SN74VMEH22501DGVR TI

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 		8 BIT UNIVERSAL BUS TRANSCEIVER AND TWO 1 BIT BUS TRANSCEIVERS WITH SPLIT LVTTL PORT FEEDB
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