SN74S373FN

更新时间： 2024-02-26 03:19:01

品牌	Logo	应用领域
德州仪器 - TI		触发器锁存器
页数	文件大小	规格书
24页	639K
描述
S SERIES, 8-BIT DRIVER, TRUE OUTPUT, PQCC20

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

SN74S373FN 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	DIP, DIP20,.3	Reach Compliance Code：	unknown
风险等级：	5.66	JESD-30 代码：	R-PDIP-T20
JESD-609代码：	e0	逻辑集成电路类型：	D LATCH
位数：	8	功能数量：	1
端子数量：	20	最高工作温度：	70 °C
最低工作温度：		输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装等效代码：	DIP20,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	电源：	5 V
子类别：	FF/Latches	标称供电电压 (Vsup)：	5 V
表面贴装：	NO	技术：	TTL
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	Base Number Matches：	1

SN74S373FN 数据手册

SN54LS373, SN54LS374, SN54S373, SN54S374,

SN74LS373, SN74LS374, SN74S373, SN74S374

OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS

SDLS165B – OCTOBER 1975 – REVISED AUGUST 2002

SN54LS373, SN54LS374, SN54S373,

SN54S374 . . . J OR W PACKAGE

SN74LS373, SN74S374 . . . DW, N, OR NS PACKAGE

Choice of Eight Latches or Eight D-Type

Flip-Flops in a Single Package

3-State Bus-Driving Outputs

Full Parallel Access for Loading

Buffered Control Inputs

SN74LS374 . . . DB, DW, N, OR NS PACKAGE

SN74S373 . . . DW OR N PACKAGE

(TOP VIEW)

Clock-Enable Input Has Hysteresis to

Improve Noise Rejection (’S373 and ’S374)

P-N-P Inputs Reduce DC Loading on Data

Lines (’S373 and ’S374)

description

These 8-bit registers feature 3-state outputs

designed specifically for driving highly capacitive

or relatively low-impedance loads. The

†

GND

high-impedance

3-state

and

increased

†

Cfor’LS373and’S373;CLKfor’LS374and’S374.

high-logic-level drive provide these registers with

the capability of being connected directly to and

driving the bus lines in a bus-organized system

without need for interface or pullup components.

These devices are particularly attractive for

implementing buffer registers, I/O ports,

bidirectional bus drivers, and working registers.

SN54LS373, SN54LS374, SN54S373,

SN54S374 . . . FK PACKAGE

(TOP VIEW)

20 19

The eight latches of the ’LS373 and ’S373 are

transparent D-type latches, meaning that while

the enable (C or CLK) input is high, the Q outputs

follow the data (D) inputs. When C or CLK is taken

low, the output is latched at the level of the data

that was set up.

9 10 11 12 13

The eight flip-flops of the ’LS374 and ’S374 are

edge-triggered D-type flip-flops. On the positive

transition of the clock, the Q outputs are set to the

logic states that were set up at the D inputs.

†

Cfor’LS373and’S373;CLKfor’LS374and’S374.

Schmitt-trigger buffered inputs at the enable/clock lines of the ’S373 and ’S374 devices simplify system design

as ac and dc noise rejection is improved by typically 400 mV due to the input hysteresis. A buffered

output-control (OC) input can be used to place the eight outputs in either a normal logic state (high or low logic

levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines

significantly.

OC does not affect the internal operation of the latches or flip-flops. That is, the old data can be retained or new

data can be entered, even while the outputs are off.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

unless otherwise noted. On all other products, production

testing of all parameters.

processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...24

下载PDF

与SN74S373FN相关器件

型号	品牌	描述	获取价格	数据表
SN74S373FN3	ROCHESTER	Bus Driver	获取价格
SN74S373J	TI	OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS	获取价格
SN74S373J-00	TI	IC S SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, Bus Driver/Transceiver	获取价格
SN74S373JP4	TI	IC,LATCH,SINGLE,8-BIT,S-TTL,DIP,20PIN,CERAMIC	获取价格
SN74S373N	TI	OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS	获取价格
SN74S373N1	TI	IC,LATCH,SINGLE,8-BIT,S-TTL,DIP,20PIN,PLASTIC	获取价格

与SN74S373FN相关文章

SG3525资料手册详解：SG3525参数分析、引脚说明、应用介绍
2024-05-23

5
AT89C51单片机资料手册详细解析及应用示例
2024-05-23

8
CP2102资料手册解读：CP2102引脚说明、关键参数分析
2024-05-23

4
资料手册解读：UC3842参数和管脚说明
2024-05-22

6

产品中心

服务支持

精选活动

关于我们

帮助中心

SN74S373FN

SN74S373FN 技术参数

SN74S373FN 数据手册

与SN74S373FN相关器件

与SN74S373FN相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

SN74S373FN

SN74S373FN 技术参数

SN74S373FN 数据手册

与SN74S373FN相关器件

与SN74S373FN相关文章

您还可以找

您在本页遇到什么问题？