Datasheet > 逻辑 > 总线驱动器/收发器> SN74LVTH652-EP

SN74LVTH652-EP

更新时间： 2024-10-02 11:58:15

品牌	Logo	应用领域
德州仪器 - TI		总线收发器输出元件
页数	文件大小	规格书
12页	328K
描述
3.3-V ABT OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

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中文翻译

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SN74LVTH652-EP 数据手册

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SCBS776 − NOVEMBER 2003

Controlled Baseline

− One Assembly/Test Site, One Fabrication

Site

Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

Enhanced Diminishing Manufacturing

Sources (DMS) Support

Latch-Up Performance Exceeds 500 mA Per

JESD 17

Enhanced Product-Change Notification

ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

†

Qualification Pedigree

Supports Mixed-Mode Signal Operation

(5-V Input and Output Voltages With

PW PACKAGE

(TOP VIEW)

3.3-V V

)

Supports Unregulated Battery Operation

Down To 2.7 V

CLKAB

SAB

OEAB

GND

CLKBA

SBA

OEBA

Typical V

<0.8 V at V

(Output Ground Bounce)

OLP

= 3.3 V, T = 25°C

and Power-Up 3-State Support Hot

off

Insertion

†

Component qualification in accordance with JEDEC and industry

standards to ensure reliable operation over an extended

temperature range. This includes, but is not limited to, Highly

Accelerated Stress Test (HAST) or biased 85/85, temperature

cycle, autoclave or unbiased HAST, electromigration, bond

intermetallic life, and mold compound life. Such qualification

testing should not be viewed as justifying use of this component

beyond specified performance and environmental limits.

description/ordering information

This bus transceiver and register is designed specifically for low-voltage (3.3-V) V

capability to provide a TTL interface to a 5-V system environment.

operation, but with the

The SN74LVTH652 consists of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for

multiplexed transmission of data directly from the data bus or from the internal storage registers.

Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB

and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for

select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between

real-time and stored data. A low input selects real-time data and a high input selects stored data. Figure 1

illustrates the four fundamental bus-management functions that can be performed with the SN74LVTH652

device.

ORDERING INFORMATION

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

‡

PACKAGE

−40°C to 85°C

TSSOP − PW Tape and reel

SN74LVTH652IPWREP

LH652EP

‡

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are

available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...12

中文翻译

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与SN74LVTH652-EP相关器件

型号	品牌	获取价格	描述	数据表
SN74LVTH652IPWREP	TI	获取价格	Enhanced Product 3.3-V Abt Octal Bus Transceivers And Registers With 3-State Outputs 24-TS
SN74LVTH652NSR	TI	获取价格	3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVTH652NSRE4	TI	获取价格	3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVTH652NSRG4	TI	获取价格	3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVTH652PW	TI	获取价格	3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVTH652PWE4	TI	获取价格	3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVTH652PWG4	TI	获取价格	3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVTH652PWLE	TI	获取价格	3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVTH652PWR	TI	获取价格	3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVTH652PWRE4	TI	获取价格	3.3V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

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