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SN74LVTH574NSR PDF预览

SN74LVTH574NSR

更新时间: 2024-09-25 22:16:27
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件信息通信管理PC
页数 文件大小 规格书
20页 606K
描述
3.3V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP FLOPS WITH 3 STATE OUTPUTS

SN74LVTH574NSR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP20,.3针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.46
Samacsys Confidence:3Samacsys Status:Released
Samacsys PartID:1586970Samacsys Pin Count:20
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Small Outline Packages
Samacsys Footprint Name:NS (R-PDSO-G20)Samacsys Released Date:2018-11-16 10:19:28
Is Samacsys:N其他特性:BROADSIDE VERSION OF 374
控制类型:ENABLE LOW计数方向:UNIDIRECTIONAL
系列:LVTJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:12.6 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:150000000 Hz最大I(ol):0.064 A
湿度敏感等级:1位数:8
功能数量:1端口数量:2
端子数量:20最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP20,.3
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TR峰值回流温度(摄氏度):260
电源:3.3 V最大电源电流(ICC):5 mA
Prop。Delay @ Nom-Sup:4.5 ns传播延迟(tpd):5.3 ns
认证状态:Not Qualified座面最大高度:2 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:5.3 mm
Base Number Matches:1

SN74LVTH574NSR 数据手册

 浏览型号SN74LVTH574NSR的Datasheet PDF文件第2页浏览型号SN74LVTH574NSR的Datasheet PDF文件第3页浏览型号SN74LVTH574NSR的Datasheet PDF文件第4页浏览型号SN74LVTH574NSR的Datasheet PDF文件第5页浏览型号SN74LVTH574NSR的Datasheet PDF文件第6页浏览型号SN74LVTH574NSR的Datasheet PDF文件第7页 
ꢊ ꢋꢊ ꢌꢅ ꢍꢎꢆ ꢏ ꢐꢆꢍꢄ ꢑꢒ ꢓꢑ ꢌꢆꢔ ꢕꢓ ꢓꢑ ꢔꢑꢒ ꢒꢌꢆ ꢖꢗ ꢑ ꢘ ꢄꢕ ꢗ ꢌꢘ ꢄꢏ ꢗ  
ꢙ ꢕꢆ ꢇ ꢊ ꢌꢀꢆꢍꢆ ꢑ ꢏ ꢚꢆ ꢗ ꢚꢆ  
SCBS688G − MAY 1997 − REVISED SEPTEMBER 2003  
D
D
D
D
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V V  
D
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
)
CC  
Support Unregulated Battery Operation  
Down to 2.7 V  
D
D
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
A
I
and Power-Up 3-State Support Hot  
off  
Insertion  
SN54LVTH574 . . . FK PACKAGE  
(TOP VIEW)  
SN74LVTH574 . . . RGY PACKAGE  
(TOP VIEW)  
SN54LVTH574 . . . J OR W PACKAGE  
SN74LVTH574 . . . DB, DW, NS,  
OR PW PACKAGE  
(TOP VIEW)  
1
20  
3
2
1 20 19  
18  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
2Q  
3Q  
4Q  
5Q  
6Q  
3D  
4D  
5D  
6D  
7D  
4
5
6
7
8
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
1Q  
2Q  
3Q  
17  
16  
15  
14  
16 4Q  
15 5Q  
9 10 11 12 13  
14  
13  
12  
11  
6Q  
7Q  
8Q  
CLK  
10  
11  
GND  
description/ordering information  
These octal flip-flops are designed specifically for low-voltage (3.3-V) V  
provide a TTL interface to a 5-V system environment.  
operation, but with the capability to  
CC  
ORDERING INFORMATION  
ORDERABLE  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PART NUMBER  
SN74LVTH574RGYR  
SN74LVTH574DW  
SN74LVTH574DWR  
SN74LVTH574NSR  
SN74LVTH574DBR  
SN74LVTH574PW  
SN74LVTH574PWR  
SN74LVTH574GQNR  
SN74LVTH574ZQNR  
SNJ54LVTH574J  
QFN − RGY  
SOIC − DW  
Tape and reel  
Tube  
LXH574  
LVTH574  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP − NS  
LVTH574  
LXH574  
SSOP − DB  
−40°C to 85°C  
TSSOP − PW  
LXH574  
LXH574  
Tape and reel  
VFBGA − GQN  
Tape and reel  
VFBGA − ZQN (Pb-free)  
CDIP − J  
Tube  
Tube  
Tube  
SNJ54LVTH574J  
SNJ54LVTH574W  
SNJ54LVTH574FK  
CFP − W  
SNJ54LVTH574W  
SNJ54LVTH574FK  
−55°C to 125°C  
LCCC − FK  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
ꢏ ꢜ ꢧ ꢟ ꢞꢪ ꢥꢤ ꢢꢣ ꢤꢞ ꢠꢧ ꢩꢛ ꢡꢜ ꢢ ꢢꢞ ꢰꢕ ꢄꢌ ꢗꢔ ꢘ ꢌꢊꢱꢂ ꢊꢂꢉ ꢡꢩꢩ ꢧꢡ ꢟ ꢡ ꢠꢦ ꢢꢦꢟ ꢣ ꢡ ꢟ ꢦ ꢢꢦ ꢣꢢꢦ ꢪ  
ꢢ ꢦ ꢣ ꢢꢛ ꢜꢯ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢋ  
ꢥ ꢜꢩ ꢦꢣꢣ ꢞ ꢢꢫꢦ ꢟ ꢭꢛ ꢣꢦ ꢜ ꢞꢢꢦ ꢪꢋ ꢏ ꢜ ꢡꢩ ꢩ ꢞ ꢢꢫꢦ ꢟ ꢧꢟ ꢞ ꢪꢥꢤ ꢢꢣ ꢉ ꢧꢟ ꢞ ꢪꢥꢤ ꢢꢛꢞ ꢜ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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