SN74LVTH374-EP

更新时间： 2024-10-02 12:21:39

品牌	Logo	应用领域
德州仪器 - TI		触发器输出元件
页数	文件大小	规格书
10页	442K
描述
3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

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SN74LVTH374-EP 数据手册

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SCBS771 − NOVEMBER 2003

Controlled Baseline

− One Assembly/Test Site, One Fabrication

Site

Bus Hold on Data Inputs Eliminates the

Need for External Pullup/Pulldown

Resistors

Enhanced Diminishing Manufacturing

Sources (DMS) Support

Latch-Up Performance Exceeds 500 mA Per

JESD 17

Enhanced Product-Change Notification

ESD Protection Exceeds JESD 22

− 2000-V Human-Body Model (A114-A)

− 200-V Machine Model (A115-A)

†

Qualification Pedigree

Supports Mixed-Mode Signal Operation

(5-V Input and Output Voltages With

PW PACKAGE

(TOP VIEW)

3.3-V V

)

Typical V

<0.8 V at V

(Output Ground Bounce)

= 3.3 V, T = 25°C

OLP

Supports Unregulated Battery Operation

Down to 2.7 V

CLK

and Power-Up 3-State Support Hot

off

Insertion

†

Component qualification in accordance with JEDEC and industry

standards to ensure reliable operation over an extended

temperature range. This includes, but is not limited to, Highly

Accelerated Stress Test (HAST) or biased 85/85, temperature

cycle, autoclave or unbiased HAST, electromigration, bond

intermetallic life, and mold compound life. Such qualification

testing should not be viewed as justifying use of this component

beyond specified performance and environmental limits.

GND

description/ordering information

This octal flip-flop is designed specifically for low-voltage (3.3-V) V

a TTL interface to a 5-V system environment.

operation, but with the capability to provide

The eight flip-flops of the SN74LVTH374 are edge-triggered D-type flip-flops. On the positive transition of the

clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high

or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive

the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus

lines without need for interface or pullup components.

OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered

while the outputs are in the high-impedance state.

When V

is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.

However, to ensure the high-impedance state above 1.5 V, OE should be tied to V

the minimum value of the resistor is determined by the current-sinking capability of the driver.

through a pullup resistor;

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.

This device is fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry

off

disables the outputs, preventing damaging current backflow through the device when it is powered down. The

power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,

which prevents driver conflict.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...10

中文翻译

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与SN74LVTH374-EP相关器件

型号	品牌	获取价格	描述	数据表
SN74LVTH374IPWREP	TI	获取价格	3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
SN74LVTH374NSR	TI	获取价格	3.3 V ABT OCTAL EDGE TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS
SN74LVTH374NSRE4	TI	获取价格	3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LVTH374NSRG4	TI	获取价格	3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LVTH374PW	TI	获取价格	3.3 V ABT OCTAL EDGE TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS
SN74LVTH374PWE4	TI	获取价格	3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LVTH374PWG4	TI	获取价格	3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LVTH374PWLE	TI	获取价格	3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74LVTH374PWR	TI	获取价格	3.3 V ABT OCTAL EDGE TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS
SN74LVTH374PWRE4	TI	获取价格	3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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