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SN74LVTH244AQPWREP

更新时间： 2024-09-14 12:21:39
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
9页 433K
描述
3.3-V ABT OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

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中文翻译

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SN74LVTH244AQPWREP 数据手册

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SCAS691C − APRIL 2003 − REVISED OCTOBER 2003  
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
D
D
D
D
D
Extended Temperature Performance of  
−40°C to 125°C  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
D
D
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Enhanced Product-Change Notification  
†
Qualification Pedigree  
DB OR PW PACKAGE  
(TOP VIEW)  
Supports Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
1
2
3
4
5
6
7
8
9
10  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
V
CC  
3.3-V V  
)
CC  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
2A1  
D
D
D
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
A
OLP  
CC  
Supports Unregulated Battery Operation  
Down to 2.7 V  
I
and Power-Up 3-State Support Hot  
off  
Insertion  
†
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
description/ordering information  
This octal buffer and line driver is designed specifically for low-voltage (3.3-V) V  
capability to provide a TTL interface to a 5-V system environment.  
operation, but with the  
CC  
The SN74LVTH244A is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE  
is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the  
high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup  
or pulldown resistors with the bus-hold circuitry is not recommended.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
‡
PACKAGE  
T
A
SSOP − DB  
Tape and reel  
Tape and reel  
SN74LVTH244AQDBREP  
SN74LVTH244AQPWREP  
LH244AEP  
LH244AEP  
−40°C to 125°C  
TSSOP − PW  
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2003, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

中文翻译

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SN74LVTH244AQPWREP 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVTZ244DW TI

类似代替

 具有总线保持、TTL 兼容型 CMOS 输入和三态输出的 8 通道、2.7V 至 3.6V
SN74LVTH244APWR TI

类似代替

 3.3 V ABT OCTAL BUFFERS / DRIVERS WITH 3 STATE OUTPUTS
SN74LVTH244APW TI

类似代替

 3.3 V ABT OCTAL BUFFERS / DRIVERS WITH 3 STATE OUTPUTS

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