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SN74LVTH16952-EP PDF预览

SN74LVTH16952-EP

更新时间: 2024-02-27 01:08:35
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
11页 311K
描述
3.3-V ABT 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

SN74LVTH16952-EP 数据手册

 浏览型号SN74LVTH16952-EP的Datasheet PDF文件第2页浏览型号SN74LVTH16952-EP的Datasheet PDF文件第3页浏览型号SN74LVTH16952-EP的Datasheet PDF文件第4页浏览型号SN74LVTH16952-EP的Datasheet PDF文件第5页浏览型号SN74LVTH16952-EP的Datasheet PDF文件第6页浏览型号SN74LVTH16952-EP的Datasheet PDF文件第7页 
ꢙ ꢔꢆ ꢇ ꢐ ꢍꢀꢆꢒꢆ ꢎ ꢚ ꢛꢆ ꢏ ꢛꢆꢀ  
SCBS789− NOVEMBER 2003  
D
D
D
D
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
D
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
Thin Shrink Small-Outline (DGG) Package  
DGG PACKAGE  
(TOP VIEW)  
Enhanced Product-Change Notification  
Qualification Pedigree  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
1OEAB  
1CLKAB  
1CLKENAB  
GND  
1OEBA  
1CLKBA  
1CLKENBA  
GND  
1B1  
1B2  
Member of the Texas Instruments  
WidebusFamily  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low Static-Power  
Dissipation  
2
3
D
4
5
1A1  
1A2  
6
7
V
V
CC  
CC  
D
Supports Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
8
1A3  
1A4  
1A5  
GND  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
1B3  
1B4  
1B5  
GND  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
9
3.3-V V  
)
CC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
D
D
D
D
Supports Unregulated Battery Operation  
Down To 2.7 V  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
OLP  
CC  
A
I
and Power-Up 3-State Support Hot  
off  
Insertion  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
D
D
D
Distributed V  
High-Speed Switching Noise  
and GND Pins Minimize  
CC  
V
V
CC  
CC  
Flow-Through Architecture Optimizes PCB  
Layout  
2A7  
2A8  
GND  
2B7  
2B8  
GND  
2CLKENBA  
2CLKBA  
2OEBA  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
2CLKENAB  
2CLKAB  
2OEAB  
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
description/ordering information  
The SN74LVTH16952 is a 16-bit registered transceiver designed for low-voltage (3.3-V) V  
the capability to provide a TTL interface to a 5-V system environment.  
operation, but with  
CC  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
ꢆꢧ  
Copyright 2003, Texas Instruments Incorporated  
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢰ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢑ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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