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SN74LVTH16652DGG PDF预览

SN74LVTH16652DGG

更新时间: 2024-11-17 23:09:43
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
13页 224K
描述
3.3-V ABT 16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

SN74LVTH16652DGG 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP56,.3,20
针数:56Reach Compliance Code:unknown
风险等级:5.3其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型:INDEPENDENT CONTROL计数方向:BIDIRECTIONAL
系列:LVTJESD-30 代码:R-PDSO-G56
长度:14 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.064 A位数:8
功能数量:2端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
最大电源电流(ICC):5 mAProp。Delay @ Nom-Sup:3.4 ns
传播延迟(tpd):4.7 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A触发器类型:POSITIVE EDGE
宽度:6.1 mmBase Number Matches:1

SN74LVTH16652DGG 数据手册

 浏览型号SN74LVTH16652DGG的Datasheet PDF文件第2页浏览型号SN74LVTH16652DGG的Datasheet PDF文件第3页浏览型号SN74LVTH16652DGG的Datasheet PDF文件第4页浏览型号SN74LVTH16652DGG的Datasheet PDF文件第5页浏览型号SN74LVTH16652DGG的Datasheet PDF文件第6页浏览型号SN74LVTH16652DGG的Datasheet PDF文件第7页 
SN54LVTH16652, SN74LVTH16652  
3.3-V ABT 16-BIT BUS TRANSCEIVERS AND REGISTERS  
WITH 3-STATE OUTPUTS  
SCBS150K – JULY 1994 – REVISED APRIL 1999  
SN54LVTH16652 . . . WD PACKAGE  
SN74LVTH16652 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low Static-Power  
Dissipation  
1OEAB  
1CLKAB  
1SAB  
GND  
1OEBA  
1CLKBA  
1SBA  
GND  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
2
3
Support Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
4
1A1  
1B1  
5
3.3-V V  
)
CC  
1A2  
1B2  
6
V
V
Support Unregulated Battery Operation  
Down to 2.7 V  
7
CC  
CC  
1A3  
1A4  
1A5  
GND  
1A6  
1A7  
1A8  
2A1  
2A2  
2A3  
GND  
2A4  
2A5  
2A6  
1B3  
1B4  
1B5  
GND  
1B6  
1B7  
1B8  
2B1  
2B2  
2B3  
GND  
2B4  
2B5  
2B6  
8
9
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
= 3.3 V, T = 25°C  
CC  
A
I
and Power-Up 3-State Support Hot  
off  
Insertion  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
Flow-Through Architecture Optimizes PCB  
Layout  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
V
V
CC  
CC  
2A7 23  
2A8 24  
34 2B7  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
33 2B8  
GND 25  
32 GND  
31 2SBA  
30 2CLKBA  
29 2OEBA  
2SAB 26  
2CLKAB 27  
2OEAB 28  
Package Options Include Plastic Shrink  
Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
description  
The ’LVTH16652 devices are 16-bit bus transceivers designed for low-voltage (3.3-V) V  
operation, but with  
CC  
the capability to provide a TTL interface to a 5-V system environment. These devices can be used as two 8-bit  
transceivers or one 16-bit transceiver.  
Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB  
and SBA) inputs are provided to select whether real-time or stored data is transferred. A low input level selects  
real-time data, and a high input level selects stored data. The circuitry used for select control eliminates the  
typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data.  
Figure 1 illustrates the four fundamental bus-management functions that can be performed with the  
’LVTH16652 devices.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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