ꢀꢁꢂ ꢃ ꢄꢅꢆ ꢇ ꢈꢉ ꢉꢃ ꢉꢊ ꢋꢌ
ꢍ ꢎꢍ ꢊꢅ ꢏꢐꢆ ꢈ ꢉ ꢊꢐꢑ ꢆ ꢐꢒꢀ ꢆ ꢓꢏꢁꢀ ꢔꢋ ꢑ ꢅꢋ ꢓ
ꢕ ꢑꢆ ꢇ ꢍ ꢊꢀꢆꢏꢆ ꢋ ꢖ ꢒꢆ ꢌꢒ ꢆꢀ
SCBS786A − NOVEMBER 2003 − REVISED APRIL 2004
D
D
Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D
D
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Enhanced Diminishing Manufacturing
Sources (DMS) Support
D
D
D
D
Enhanced Product-Change Notification
D
Thin Shrink Small-Outline (DGG) Package
†
Qualification Pedigree
DGG PACKAGE
(TOP VIEW)
Member of the Texas Instruments
Widebus Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1DIR
1CLKAB
1SAB
GND
1OE
2
1CLKBA
1SBA
GND
1B1
3
4
5
1A1
1A2
D
Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
6
1B2
7
V
V
CC
CC
3.3-V V
)
CC
8
1A3
1A4
1A5
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
D
D
D
D
Supports Unregulated Battery Operation
Down To 2.7 V
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Typical V
<0.8 V at V
(Output Ground Bounce)
OLP
CC
= 3.3 V, T = 25°C
A
I
and Power-Up 3-State Support Hot
off
Insertion
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D
D
Distributed V
High-Speed Switching Noise
and GND Pins Minimize
CC
Flowthrough Architecture Optimizes PCB
Layout
V
V
CC
CC
†
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
2A7
2A8
GND
2B7
2B8
GND
2SBA
2CLKBA
2OE
2SAB
2CLKAB
2DIR
description/ordering information
The SN74LVTH16646 is a 16-bit bus transceiver designed for low-voltage (3.3-V) V
capability to provide a TTL interface to a 5-V system environment.
operation, but with the
CC
This device can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked
into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1
illustrates the four fundamental bus-management functions that can be performed with the SN74LVTH16646
device.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
ꢌꢓ ꢖ ꢗꢒ ꢔ ꢆꢑ ꢖ ꢁ ꢗ ꢏꢆꢏ ꢘꢙ ꢚ ꢛꢜ ꢝ ꢞꢟ ꢘꢛꢙ ꢘꢠ ꢡꢢ ꢜ ꢜ ꢣꢙꢟ ꢞꢠ ꢛꢚ ꢤꢢꢥ ꢦꢘꢡ ꢞꢟ ꢘꢛꢙ ꢧꢞ ꢟꢣ ꢎ
ꢌꢜ ꢛ ꢧꢢꢡ ꢟ ꢠ ꢡ ꢛꢙ ꢚꢛ ꢜ ꢝ ꢟ ꢛ ꢠ ꢤꢣ ꢡ ꢘꢚ ꢘꢡꢞ ꢟꢘ ꢛꢙꢠ ꢤꢣ ꢜ ꢟꢨ ꢣ ꢟꢣ ꢜ ꢝꢠ ꢛꢚ ꢆꢣꢩ ꢞꢠ ꢑꢙꢠ ꢟꢜ ꢢꢝ ꢣꢙꢟ ꢠ
ꢠ ꢟ ꢞ ꢙꢧ ꢞ ꢜꢧ ꢪ ꢞ ꢜꢜ ꢞ ꢙ ꢟꢫꢎ ꢌꢜ ꢛ ꢧꢢꢡ ꢟꢘꢛꢙ ꢤꢜ ꢛꢡ ꢣꢠ ꢠꢘ ꢙꢬ ꢧꢛꢣ ꢠ ꢙꢛꢟ ꢙꢣ ꢡꢣ ꢠꢠ ꢞꢜ ꢘꢦ ꢫ ꢘꢙꢡ ꢦꢢꢧ ꢣ
ꢟ ꢣ ꢠ ꢟꢘ ꢙꢬ ꢛꢚ ꢞ ꢦꢦ ꢤꢞ ꢜ ꢞ ꢝ ꢣ ꢟ ꢣ ꢜ ꢠ ꢎ
Copyright 2004, Texas Instruments Incorporated
1
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