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SN74LVTH16500-EP PDF预览

SN74LVTH16500-EP

更新时间: 2024-11-20 12:21:39
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
10页 302K
描述
3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

SN74LVTH16500-EP 数据手册

 浏览型号SN74LVTH16500-EP的Datasheet PDF文件第2页浏览型号SN74LVTH16500-EP的Datasheet PDF文件第3页浏览型号SN74LVTH16500-EP的Datasheet PDF文件第4页浏览型号SN74LVTH16500-EP的Datasheet PDF文件第5页浏览型号SN74LVTH16500-EP的Datasheet PDF文件第6页浏览型号SN74LVTH16500-EP的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅꢆ ꢇ ꢈꢉ ꢊꢋ ꢋꢌ ꢍꢎ  
ꢘ ꢔꢆ ꢇ ꢏ ꢌꢀꢆꢑꢆ ꢍ ꢙ ꢕꢆ ꢎ ꢕꢆꢀ  
SCBS783 − NOVEMBER 2003  
D
D
D
D
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
− 1000-V Charged-Device Model (C101)  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
DGG PACKAGE  
(TOP VIEW)  
Enhanced Product-Change Notification  
Qualification Pedigree  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
OEAB  
LEAB  
A1  
GND  
A2  
GND  
CLKAB  
B1  
GND  
B2  
Member of the Texas Instruments  
WidebusFamily  
UBT Transceivers Combine D-Type  
Latches and D-Type Flip-Flops for  
Operation in Transparent, Latched, or  
Clocked Mode  
2
3
D
4
5
6
A3  
B3  
7
V
V
CC  
A4  
CC  
D
Supports Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
8
B4  
B5  
B6  
GND  
B7  
9
A5  
A6  
GND  
A7  
A8  
A9  
A10  
A11  
A12  
GND  
A13  
A14  
A15  
3.3-V V  
)
CC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
D
D
D
D
Supports Unregulated Battery Operation  
Down To 2.7 V  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
B8  
B9  
OLP  
CC  
A
B10  
B11  
B12  
GND  
B13  
B14  
B15  
I
and Power-Up 3-State Support Hot  
off  
Insertion  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
D
D
D
Distributed V  
High-Speed Switching Noise  
and GND Pins Minimize  
CC  
V
V
CC  
CC  
Flow-Through Architecture Optimizes PCB  
Layout  
A16  
A17  
GND  
A18  
OEBA  
LEBA  
B16  
B17  
GND  
B18  
CLKBA  
GND  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
description/ordering information  
The SN74LVTH16500 is an 18-bit universal bus transceiver designed for low-voltage (3.3-V) V  
but with the capability to provide a TTL interface to a 5-V system environment.  
operation,  
CC  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus and UBT are trademarks of Texas Instruments.  
ꢆꢦ  
Copyright 2003, Texas Instruments Incorporated  
ꢢ ꢦ ꢣ ꢢꢛ ꢜꢯ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢐ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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