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SN74LVTH16374GQLR

更新时间： 2024-02-03 03:01:00
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德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
15页 479K
描述
3.3V ABT 16 BIT EDGE - TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS

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SN74LVTH16374GQLR 数据手册

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SCBS145O − MAY 1992 − REVISED SEPTEMBER 2003  
SN54LVTH16374 . . . WD PACKAGE  
SN74LVTH16374 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
D
D
Members of the Texas Instruments  
WidebusFamily  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low Static-Power  
Dissipation  
1
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1CLK  
48  
2
47 1D1  
46 1D2  
45 GND  
44 1D3  
43 1D4  
3
D
Support Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
4
5
3.3-V V  
)
6
CC  
7
V
42  
V
D
D
D
D
Support Unregulated Battery Operation  
Down to 2.7 V  
CC  
CC  
8
1Q5  
1Q6  
GND  
1Q7  
1Q8  
2Q1  
2Q2  
GND  
2Q3  
2Q4  
41 1D5  
40 1D6  
39 GND  
38 1D7  
37 1D8  
36 2D1  
35 2D2  
34 GND  
33 2D3  
32 2D4  
9
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
= 3.3 V, T = 25°C  
A
I
and Power-Up 3-State Support Hot  
off  
Insertion  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
D
D
D
D
Distributed V  
High-Speed Switching Noise  
and GND Pins Minimize  
CC  
V
31  
V
CC  
CC  
Flow-Through Architecture Optimizes PCB  
Layout  
2Q5  
2Q6  
GND  
2Q7  
2Q8  
2OE  
30 2D5  
29 2D6  
28 GND  
27 2D7  
26 2D8  
25 2CLK  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
description/ordering information  
The ’LVTH16374 devices are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed for  
low-voltage (3.3-V) V operation, but with the capability to provide a TTL interface to a 5-V system  
CC  
environment. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional  
bus drivers, and working registers.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
Tube  
SN74LVTH16374DL  
SSOP − DL  
LVTH16374  
Tape and reel SN74LVTH16374DLR  
Tape and reel SN74LVTH16374DGGR  
SN74LVTH16374GQLR  
TSSOP − DGG  
VFBGA − GQL  
VFBGA − ZQL (Pb-free)  
CFP − WD  
LVTH16374  
−40°C to 85°C  
−55°C to 125°C  
Tape and reel  
LL374  
SN74LVTH16374ZQLR  
Tube  
SNJ54LVTH16374WD  
SNJ54LVTH16374WD  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
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Copyright 2003, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...15

中文翻译

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SN74LVTH16374GQLR 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVTH16374ZQLR TI

完全替代

 3.3V ABT 16 BIT EDGE - TRIGGERED D TYPE FLIP FLOPS WITH 3 STATE OUTPUTS

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