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SN74LVT652 PDF预览

SN74LVT652

更新时间: 2024-09-15 23:06:23
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德州仪器 - TI 总线收发器输出元件
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11页 181K
描述
3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

SN74LVT652 数据手册

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SN54LVT652, SN74LVT652  
3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS  
WITH 3-STATE OUTPUTS  
SCBS141E – MAY 1992 – REVISED JULY 1995  
SN54LVT652 . . . JT PACKAGE  
SN74LVT652 . . . DB, DW, OR PW PACKAGE  
(TOP VIEW)  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low-Static Power  
Dissipation  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
CLKAB  
SAB  
OEAB  
A1  
V
CC  
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V V  
2
CLKBA  
SBA  
OEBA  
B1  
)
CC  
3
Support Unregulated Battery Operation  
Down to 2.7 V  
4
5
A2  
6
A3  
B2  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
7
A4  
B3  
= 3.3 V, T = 25°C  
CC  
A
8
A5  
B4  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model  
(C = 200 pF, R = 0)  
9
A6  
B5  
10  
11  
12  
A7  
A8  
GND  
B6  
B7  
B8  
Latch-Up Performance Exceeds 500 mA  
Per JEDEC Standard JESD-17  
SN54LVT652 . . . FK PACKAGE  
(TOP VIEW)  
Bus-Hold Data Inputs Eliminate the Need  
for External Pullup Resistors  
Support Live Insertion  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK), and  
Ceramic (JT) DIPs  
4
3
2 1 28 27 26  
25  
24  
23  
22  
21  
20  
19  
5
6
7
8
9
A1  
A2  
A3  
NC  
A4  
OEBA  
B1  
B2  
NC  
B3  
B4  
description  
These bus transceivers and registers are  
designed specifically for low-voltage (3.3-V) V  
operation, but with the capability to provide a TTL  
interface to a 5-V system environment.  
A5 10  
A6 11  
B5  
CC  
12 13 14 15 16 17 18  
The ’LVT652 consist of bus transceiver circuits,  
D-type flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the  
data bus or from the internal storage registers.  
NC – No internal connection  
Output-enable (OEAB and OEBA) inputs are provided to control the transceiver functions. Select-control (SAB  
and SBA) inputs are provided to select whether real-time or stored data is transferred. The circuitry used for  
select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between  
real-time and stored data. A low input selects real-time data and a high input selects stored data. Figure 1  
illustrates the four fundamental bus-management functions that can be performed with the LVT652.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1995, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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