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SN74LVT2952DWR

更新时间： 2024-11-06 12:58:31
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
9页 151K
描述
3.3-V ABT Octal Bus Transceivers And Registers With 3-State Outputs 24-SOIC -40 to 85

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SN74LVT2952DWR 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP24,.4针数：24
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
风险等级：5.45其他特性：WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; WITH CLOCK ENABLE
控制类型：INDEPENDENT CONTROL计数方向：BIDIRECTIONAL
系列：LVTJESD-30 代码：R-PDSO-G24
长度：15.4 mm负载电容（CL）：50 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.064 A
位数：8功能数量：1
端口数量：2端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP24,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3 V最大电源电流（ICC）：12 mA
Prop。Delay @ Nom-Sup：6.1 ns传播延迟（tpd）：6.9 ns
认证状态：Not Qualified座面最大高度：2.65 mm
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：BICMOS
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
触发器类型：POSITIVE EDGE宽度：7.5 mm
Base Number Matches：1

SN74LVT2952DWR 数据手册

 浏览型号SN74LVT2952DWR的Datasheet PDF文件第2页浏览型号SN74LVT2952DWR的Datasheet PDF文件第3页浏览型号SN74LVT2952DWR的Datasheet PDF文件第4页浏览型号SN74LVT2952DWR的Datasheet PDF文件第5页浏览型号SN74LVT2952DWR的Datasheet PDF文件第6页浏览型号SN74LVT2952DWR的Datasheet PDF文件第7页 
SN54LVT2952, SN74LVT2952  
3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS  
WITH 3-STATE OUTPUTS  
SCBS152E – MAY 1992 – REVISED JULY 1995  
SN54LVT2952 . . . JT PACKAGE  
SN74LVT2952 . . . DB, DW, OR PW PACKAGE  
(TOP VIEW)  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low-Static Power  
Dissipation  
B8  
B7  
V
CC  
A8  
1
24  
23  
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V V  
2
)
CC  
B6  
B5  
B4  
3
22 A7  
21 A6  
20 A5  
Support Unregulated Battery Operation  
Down to 2.7 V  
4
5
6
19  
18  
17  
16  
15  
14  
13  
B3  
B2  
B1  
A4  
A3  
A2  
A1  
OEBA  
CLKBA  
CLKENBA  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
7
= 3.3 V, T = 25°C  
CC  
A
8
ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model  
(C = 200 pF, R = 0)  
9
OEAB  
CLKAB  
CLKENAB  
GND  
10  
11  
12  
Latch-Up Performance Exceeds 500 mA  
Per JEDEC Standard JESD-17  
SN54LVT2952 . . . FK PACKAGE  
(TOP VIEW)  
Bus-Hold Data Inputs Eliminate the Need  
for External Pullup Resistors  
Support Live Insertion  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK), and  
Ceramic (JT) DIPs  
4
3
2
1
28 27 26  
25  
5
B5  
B4  
B3  
NC  
B2  
A6  
6
24 A5  
23 A4  
22  
21  
20  
19  
7
8
NC  
A3  
A2  
A1  
9
description  
10  
11  
B1  
OEAB  
These octal bus transceivers and registers are  
designed specifically for low-voltage (3.3-V) V  
12 13 14 15 16 17 18  
CC  
operation, but with the capability to provide a TTL  
interface to a 5-V system environment.  
The ’LVT2952 consist of two 8-bit back-to-back  
registers that store data flowing in both directions  
between two bidirectional buses. Data on the A or  
B bus is stored in the registers on the low-to-high  
NC – No internal connection  
transition of the clock (CLKAB or CLKBA) input provided that the clock-enable (CLKENAB or CLKENBA) input  
is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN74LVT2952 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count  
and functionality of standard small-outline packages in less than half the printed-circuit-board area.  
The SN54LVT2952 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74LVT2952 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1995, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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与SN74LVT2952DWR相关器件

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SN74LVT2952PW TI

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 		LVT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
SN74LVT2952PWLE TI

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 		3.3-V ABT OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVT2952PWR TI

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 		3.3-V ABT Octal Bus Transceivers And Registers With 3-State Outputs 24-TSSOP -40 to 85
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 		3.3-V ABT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
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 		3.3-V ABT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVT32240ZKER TI

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 		3.3-V ABT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVT32244 TI

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 		3.3-V ABT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
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 		3.3-V ABT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVT32244GKER TI

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 		3.3-V ABT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVT32244ZKER TI

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 		3.3-V ABT 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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