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SN74LVT244BPWRG4 PDF预览

SN74LVT244BPWRG4

更新时间: 2024-11-18 05:16:59
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件信息通信管理
页数 文件大小 规格书
17页 761K
描述
3.3-V ABT OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

SN74LVT244BPWRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP20,.25针数:20
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:8 weeks
风险等级:5.02Is Samacsys:N
控制类型:ENABLE LOW计数方向:UNIDIRECTIONAL
系列:LVTJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:6.5 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.064 A湿度敏感等级:1
位数:4功能数量:2
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP20,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TR
峰值回流温度(摄氏度):260电源:3.3 V
最大电源电流(ICC):5 mAProp。Delay @ Nom-Sup:3.5 ns
传播延迟(tpd):3.8 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceiver
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

SN74LVT244BPWRG4 数据手册

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ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇꢃ ꢃꢈ  
ꢉ ꢊꢉ ꢋꢅ ꢌꢈꢆ ꢍ ꢎꢆꢌꢄ ꢈꢏꢐ ꢐ ꢑꢒ ꢓꢔ ꢒꢕ ꢅ ꢑ ꢒ  
ꢖ ꢕꢆ ꢗ ꢉ ꢋꢀꢆꢌꢆ ꢑ ꢍ ꢏꢆ ꢘ ꢏꢆꢀ  
SCAS354J − FEBRUARY 1994 − REVISED SEPTEMBER 2003  
D
Supports Mixed-Mode Signal Operation  
(5-V Input and Output Voltages With  
D
D
D
I
and Power-Up 3-State Support Hot  
off  
Insertion  
3.3-V V  
)
CC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
D
D
Supports Unregulated Battery Operation  
Down to 2.7 V  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
− 1000-V Charged-Device Model (C101)  
DB, DW, NS, OR PW PACKAGE  
(TOP VIEW)  
RGY PACKAGE  
(TOP VIEW)  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
13 2A2  
12 1Y4  
11  
2A1  
10  
11  
description/ordering information  
This octal buffer and line driver is designed specifically for low-voltage (3.3-V) V  
capability to provide a TTL interface to a 5-V system environment.  
operation, but with the  
CC  
The SN74LVT244B is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE  
is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the  
high-impedance state.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
QFN − RGY  
SOIC − DW  
Tape and reel  
Tube  
SN74LVT244BRGYR  
SN74LVT244BDW  
SN74LVT244BDWR  
SN74LVT244BNSR  
SN74LVT244BDBR  
SN74LVT244BPW  
SN74LVT244BPWR  
SN74LVT244BGQNR  
SN74LVT244BZQNR  
LX244B  
LVT244B  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
SOP − NS  
LVT244B  
LX244B  
SSOP − DB  
−40°C to 85°C  
TSSOP − PW  
LX244B  
LX244B  
Tape and reel  
VFBGA − GQN  
Tape and reel  
VFBGA − ZQN (Pb-free)  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢆꢤ  
Copyright 2003, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢭ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢊ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVT244BPWRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVTH244APWR TI

完全替代

3.3 V ABT OCTAL BUFFERS / DRIVERS WITH 3 STATE OUTPUTS
SN74LVT244BPW TI

完全替代

3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVT244BDW TI

完全替代

3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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