SN54LVT244B, SN74LVT244B
3.3-V ABT OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCAS354F – FEBRUARY 1994 – REVISED APRIL 2000
SN54LVT244B . . . J OR W PACKAGE
SN74LVT244B . . . DB, DW, OR PW PACKAGE
(TOP VIEW)
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
High-Impedance State During Power Up
and Power Down
2OE
1Y1
2A4
1Y2
2A3
1Y3
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V
)
CC
Support Unregulated Battery Operation
Down to 2.7 V
13 2A2
12 1Y4
Typical V
<0.8 V at V
(Output Ground Bounce)
OLP
CC
= 3.3 V, T = 25°C
A
11
2A1
I
and Power-Up 3-State Support Hot
off
Insertion
SN54LVT244B . . . FK PACKAGE
(TOP VIEW)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
3
2
1 20 19
18
1Y1
2A4
1Y2
2A3
1Y3
1A2
2Y3
1A3
2Y2
1A4
4
5
6
7
8
– 1000-V Charged-Device Model (C101)
17
16
15
14
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK),
Ceramic Flat (W) Packages, and Ceramic
(J) DIPs
9 10 11 12 13
description
These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) V operation, but with the
CC
capability to provide a TTL interface to a 5-V system environment.
The ’LVT244B is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low,
the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
When V
is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
CC
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
the minimum value of the resistor is determined by the current-sinking capability of the driver.
through a pullup resistor;
CC
These devices are fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry
off
off
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
The SN54LVT244B is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LVT244B is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2000, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265