5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN74LVT16501DL
SN74LVT16501DL PDF预览

SN74LVT16501DL

更新时间： 2024-11-17 23:06:23
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件信息通信管理PC
页数 文件大小 规格书
12页 202K
描述
3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

SN74LVT16501DL 技术参数

是否Rohs认证：符合生命周期：Obsolete
零件包装代码：SSOP包装说明：SSOP, SSOP56,.4
针数：56Reach Compliance Code：compliant
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：7.14Samacsys Confidence：
Samacsys Status：ReleasedSamacsys PartID：604992
Samacsys Pin Count：56Samacsys Part Category：Integrated Circuit
Samacsys Package Category：OtherSamacsys Footprint Name：SOP63P1035X279-56N
Samacsys Released Date：2017-01-12 12:59:53Is Samacsys：N
其他特性：WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONAL系列：LVT
JESD-30 代码：R-PDSO-G56JESD-609代码：e4
长度：18.415 mm负载电容（CL）：50 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.064 A
湿度敏感等级：1位数：18
功能数量：1端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP56,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：3.3 V
最大电源电流（ICC）：5 mAProp。Delay @ Nom-Sup：5.9 ns
传播延迟（tpd）：8.9 ns认证状态：Not Qualified
座面最大高度：2.79 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2.7 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：BICMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.635 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
触发器类型：POSITIVE EDGE宽度：7.5 mm
Base Number Matches：1

SN74LVT16501DL 数据手册

 浏览型号SN74LVT16501DL的Datasheet PDF文件第2页浏览型号SN74LVT16501DL的Datasheet PDF文件第3页浏览型号SN74LVT16501DL的Datasheet PDF文件第4页浏览型号SN74LVT16501DL的Datasheet PDF文件第5页浏览型号SN74LVT16501DL的Datasheet PDF文件第6页浏览型号SN74LVT16501DL的Datasheet PDF文件第7页 
SN54LVT16501, SN74LVT16501  
3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS147G – MAY 1992 – REVISED NOVEMBER 1996  
SN54LVT16501 . . . WD PACKAGE  
SN74LVT16501 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low-Static Power  
Dissipation  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
OEAB  
LEAB  
A1  
GND  
CLKAB  
B1  
Members of the Texas Instruments  
Widebus Family  
2
3
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V V  
4
GND  
A2  
GND  
B2  
)
5
CC  
6
Support Unregulated Battery Operation  
Down to 2.7 V  
A3  
B3  
7
V
V
B4  
CC  
A4  
CC  
8
UBT (Universal Bus Transceiver)  
Combines D-Type Latches and D-Type  
Flip-Flops for Operation in Transparent,  
Latched, or Clocked Mode  
9
A5  
A6  
B5  
B6  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
GND  
A7  
A8  
GND  
B7  
B8  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
A9  
B9  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model  
A10  
A11  
A12  
GND  
A13  
A14  
A15  
B10  
B11  
B12  
GND  
B13  
B14  
B15  
(C = 200 pF, R = 0)  
Latch-Up Performance Exceeds 500 mA  
Per JEDEC Standard JESD-17  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
V
V
CC  
CC  
A16  
A17  
GND  
A18  
OEBA  
LEBA  
B16  
B17  
GND  
B18  
CLKBA  
GND  
Support Live Insertion  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
Flow-Through Architecture Optimizes  
PCB Layout  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
description  
The ’LVT16501 are 18-bit universal bus transceivers designed for low-voltage (3.3-V) V  
the capability to provide a TTL interface to a 5-V system environment.  
operation, but with  
CC  
Data flow in each direction is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA),  
and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the devices operate in the transparent mode when  
LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is  
low, the A-bus data is stored in the latch/flip-flop on the low-to-high transition of CLKAB. When OEAB is high,  
the outputs are active. When OEAB is low, the outputs are in the high-impedance state.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus and UBT are trademarks of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...12

中文翻译

下载PDF

SN74LVT16501DL 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVTH16501DL TI

完全替代

 3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT16501DLR TI

完全替代

 3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVTH16501DLR TI

类似代替

 3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

与SN74LVT16501DL相关器件

型号 品牌 获取价格 描述 数据表
SN74LVT16501DLG4 TI

获取价格

 		3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT16501DLR TI

获取价格

 		3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT16501DLRG4 TI

获取价格

 		3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT16543 TI

获取价格

 		3.3-V ABT 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT16543DGG TI

获取价格

 		3.3-V ABT 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT16543DGGR TI

获取价格

 		3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputs 56-TSSOP -40 to 85
SN74LVT16543DL TI

获取价格

 		3.3-V ABT 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT16543DLG4 TI

获取价格

 		3.3-V ABT 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT16543DLR TI

获取价格

 		3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputs 56-SSOP -40 to 85
SN74LVT16543DLRG4 TI

获取价格

 		3.3-V ABT 16-Bit Registered Transceivers With 3-State Outputs 56-SSOP -40 to 85

与SN74LVT16501DL相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证