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SN74LVT16245A

更新时间： 2024-11-05 05:16:59
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德州仪器 - TI 输出元件
页数 文件大小 规格书
7页 106K
描述
3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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SN74LVT16245A 数据手册

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SN54LVT16245A, SN74LVT16245A  
3.3-V ABT 16-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCBS143E – MAY 1992 – REVISED JANUARY 1996  
SN54LVT16245A . . . WD PACKAGE  
SN74LVT16245A . . . DGG OR DL PACKAGE  
(TOP VIEW)  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V  
Operation and Low-Static Power  
Dissipation  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
Members of the Texas Instruments  
Widebus Family  
2
3
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 3.3-V V  
4
)
CC  
5
Support Unregulated Battery Operation  
Down to 2.7 V  
6
7
V
V
CC  
CC  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
9
= 3.3 V, T = 25°C  
CC  
A
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model  
(C = 200 pF, R = 0)  
Latch-Up Performance Exceeds 500 mA  
Per JEDEC Standard JESD-17  
Bus-Hold Data Inputs Eliminate the Need  
for External Pullup Resistors  
V
V
CC  
CC  
Support Live Insertion  
2B5  
2B6  
GND  
2B7  
2B8  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
Flow-Through Architecture Optimizes  
PCB Layout  
2DIR  
Packaged in Plastic 300-mil Shrink  
Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
description  
The ’LVT16245A are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage (3.3-V) V  
operation, but with the capability to provide a TTL interface to a 5-V system environment.  
CC  
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. They allow data transmission  
from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control  
(DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively  
isolated.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567

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