5秒后页面跳转
SN74LVT125QDRG4Q1 PDF预览

SN74LVT125QDRG4Q1

更新时间: 2024-01-25 08:25:17
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件输入元件信息通信管理
页数 文件大小 规格书
10页 228K
描述
3.3-V ABT QUADRUPLE BUS BUFFER WITH 3-STATE OUTPUTS

SN74LVT125QDRG4Q1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:GREEN, PLASTIC, MS-012AB, SOIC-14针数:14
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:8 weeks风险等级:5.14
Is Samacsys:N其他特性:TYP VOLP < 0.8V @ VCC = 3.3V, TA = 25 DEG C; INPUTS CAN BE DRIVEN BY 3.3/5V DEVICES; BUS HOLD INPUTS
控制类型:ENABLE LOW计数方向:UNIDIRECTIONAL
系列:LVTJESD-30 代码:R-PDSO-G14
JESD-609代码:e4长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.032 A湿度敏感等级:1
位数:1功能数量:4
端口数量:2端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TR
峰值回流温度(摄氏度):260电源:3.3 V
最大电源电流(ICC):7 mAProp。Delay @ Nom-Sup:4.2 ns
传播延迟(tpd):5.1 ns认证状态:Not Qualified
筛选级别:AEC-Q100座面最大高度:1.75 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:BICMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A宽度:3.91 mm
Base Number Matches:1

SN74LVT125QDRG4Q1 数据手册

 浏览型号SN74LVT125QDRG4Q1的Datasheet PDF文件第2页浏览型号SN74LVT125QDRG4Q1的Datasheet PDF文件第3页浏览型号SN74LVT125QDRG4Q1的Datasheet PDF文件第4页浏览型号SN74LVT125QDRG4Q1的Datasheet PDF文件第5页浏览型号SN74LVT125QDRG4Q1的Datasheet PDF文件第6页浏览型号SN74LVT125QDRG4Q1的Datasheet PDF文件第7页 
SN74LVT125-Q1  
www.ti.com....................................................................................................................................................... SCBS763BAUGUST 2003REVISED APRIL 2008  
3.3-V ABT QUADRUPLE BUS BUFFER  
WITH 3-STATE OUTPUTS  
1
FEATURES  
Qualified for Automotive Applications  
D OR PW PACKAGE  
(TOP VIEW)  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1OE  
1A  
VCC  
4OE  
4A  
4Y  
3OE  
3A  
Supports Mixed-Mode Signal Operation (5-V  
1Y  
2OE  
2A  
2Y  
GND  
Input and Output Voltages With 3.3-V VCC  
)
Supports Unregulated Battery Operation Down  
to 2.7 V  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
8
3Y  
Ioff Supports Partial-Power-Down Mode  
Operation  
Bus-Hold Data Inputs Eliminate the Need for  
External Pullup Resistors  
DESCRIPTION/ORDERING INFORMATION  
This bus buffer is designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a  
TTL interface to a 5-V system environment.  
The SN74LVT125-Q1 features independent line drivers with 3-state outputs. Each output is in the  
high-impedance state when the associated output-enable (OE) input is high.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION(1)  
TA  
PACKAGE(2)  
Tape and reel  
Tape and reel  
ORDERABLE PART NUMBER  
SN74LVT125QDRQ1  
TOP-SIDE MARKING  
LVT125Q  
LVT125Q  
SOIC – D  
–40°C to 125°C  
TSSOP – PW  
SN74LVT125QPWRQ1  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
web site at www.ti.com.  
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2003–2008, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

与SN74LVT125QDRG4Q1相关器件

型号 品牌 获取价格 描述 数据表
SN74LVT125QDRQ1 TI

获取价格

3.3-V ABT QUADRUPLE BUS BUFFER WITH 3-STATE OUTPUTS
SN74LVT125QPWREP TI

获取价格

3.3-V ABT QUADRUPLE BUS BUFFER WITH 3-STATE OUTPUTS
SN74LVT125QPWRG4Q1 TI

获取价格

3.3-V ABT QUADRUPLE BUS BUFFER WITH 3-STATE OUTPUTS
SN74LVT125QPWRQ1 TI

获取价格

3.3-V ABT QUADRUPLE BUS BUFFER WITH 3-STATE OUTPUTS
SN74LVT162240 TI

获取价格

3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVT162240DGG TI

获取价格

LVT SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48
SN74LVT162240DGGR TI

获取价格

3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVT162240DGVR TI

获取价格

3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVT162240DL TI

获取价格

3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SN74LVT162240DLG4 TI

获取价格

3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS