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SN74LVCR32245A PDF预览

SN74LVCR32245A

更新时间: 2024-11-05 09:12:39
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
10页 275K
描述
32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

SN74LVCR32245A 数据手册

 浏览型号SN74LVCR32245A的Datasheet PDF文件第2页浏览型号SN74LVCR32245A的Datasheet PDF文件第3页浏览型号SN74LVCR32245A的Datasheet PDF文件第4页浏览型号SN74LVCR32245A的Datasheet PDF文件第5页浏览型号SN74LVCR32245A的Datasheet PDF文件第6页浏览型号SN74LVCR32245A的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅꢆꢇ ꢈꢉ ꢉꢃ ꢊꢋ  
ꢈ ꢉ ꢌꢍꢎ ꢏ ꢍꢐꢀ ꢏ ꢇꢋꢁ ꢀꢆ ꢑ ꢎꢅ ꢑ ꢇ  
ꢒ ꢎꢏ ꢓ ꢈ ꢌꢀꢏꢋꢏ ꢑ ꢔ ꢐꢏ ꢕꢐ ꢏꢀ  
SCES428B − FEBRUARY 2003 − REVISED SEPTEMBER 2003  
D
Member of the Texas Instruments  
Widebus+Family  
Operates From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
D
D
I
Supports Partial-Power-Down Mode  
off  
Operation  
D
D
D
D
Supports Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
3.3-V V  
)
CC  
Max t of 4.8 ns at 3.3 V  
pd  
D
D
D
Other Products to Consider:  
SN74LVC32245, SN74LVCH32245A  
Input and Output Ports Have Equivalent  
26-Series Resistors, So No External  
Resistors Are Required  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
D
D
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
A
OLP  
CC  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
Typical V  
(Output V  
Undershoot)  
OHV  
OH  
>2 V at V  
= 3.3 V, T = 25°C  
CC  
A
− 1000-V Charged-Device Model (C101)  
description/ordering information  
This 32-bit (quad-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V V  
operation.  
CC  
The SN74LVC32245A is designed for asynchronous communication between data buses. The control-function  
implementation minimizes external timing requirements.  
This device can be used as four 8-bit transceivers, two 16-bit transceivers, or one 32-bit transceiver. It allows  
data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at  
the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the  
buses are effectively isolated.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
The outputs, which are designed to sink up to 12 mA, include equivalent 26-resistors to reduce overshoot  
and undershoot.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
LFBGA − GKE  
LFBGA − ZKE (Pb-free)  
SN74LVCR32245AGKER  
SN74LVCR32245AZKER  
−40°C to 85°C  
Tape and reel  
ND245A  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus+ is a trademark of Texas Instruments.  
ꢏꢢ  
Copyright 2003, Texas Instruments Incorporated  
ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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