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SN74LVCHR32245A PDF预览

SN74LVCHR32245A

更新时间: 2024-01-06 11:39:23
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德州仪器 - TI 总线收发器输出元件
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描述
32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

SN74LVCHR32245A 数据手册

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SN74LVCHR32245A  
32-BIT BUS TRANSCEIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES601AUGUST 2004REVISED SEPTEMBER 2005  
FEATURES  
Member of the Texas Instruments Widebus+™  
Family  
Ioff Supports Partial-Power-Down Mode  
Operation  
Operates From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 4.8 ns at 3.3 V  
Supports Mixed-Mode Signal Operation on All  
Ports (5-V Input/Output Voltage With 3.3-V  
VCC  
)
Other Products to Consider: SN74LVC32245,  
SN74LVCH32245A, SN74LVCR32245A  
Input and Output Ports Have Equivalent 26-  
Series Resistors, So No External Resistors  
Are Required  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Typical VOLP (Output Ground Bounce) <0.8 V  
at VCC = 3.3 V, TA = 25°C  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Typical VOHV (Output VOH Undershoot) >2 V at  
VCC = 3.3 V, TA = 25°C  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
– 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
This 32-bit (quad-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V VCC operation.  
The SN74LVCHR32245A is designed for asynchronous communication between data buses. The  
control-function implementation minimizes external timing requirements.  
This device can be used as four 8-bit transceivers, two 16-bit transceivers, or one 32-bit transceiver. It allows  
data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses  
are effectively isolated.  
The data I/Os and control inputs are overvoltage tolerant. This feature allows the use of this device for down  
translation in a mixed-voltage environment.  
The outputs, which are designed to sink up to 12 mA, include equivalent 26-resistors to reduce overshoot and  
undershoot.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or  
pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input  
circuit and is not disabled by OE or DIR.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LVCHR32245AKR  
TOP-SIDE MARKING  
LFBGA – GKE  
LFBGA – ZKE (Pb-free)  
–40°C to 85°C  
Tape and reel  
LQ245A  
74LVCHR32245AZKER  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus+ is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2004–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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