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SN74LVCH245A

更新时间： 2024-11-22 23:06:23
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德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
9页 130K
描述
OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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SN74LVCH245A 数据手册

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SN54LVCH245A, SN74LVCH245A  
OCTAL BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCES008F – JULY 1995 - REVISED JUNE 1998  
SN54LVCH245A . . . J OR W PACKAGE  
SN74LVCH245A . . . DB, DW, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
DIR  
A1  
A2  
A3  
A4  
V
CC  
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
B8  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Power Off Disables Outputs, Permitting  
Live Insertion  
A5  
A6  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
A7  
A8  
GND  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Support Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
SN54LVCH245A . . . FK PACKAGE  
(TOP VIEW)  
3.3-V V  
)
CC  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
3
2
1 20 19  
18  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
B1  
B2  
B3  
B4  
B5  
Package Options Include Plastic  
17  
16  
15  
14  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Flat (W) Package,  
Ceramic Chip Carriers (FK), and DIPs (J)  
9 10 11 12 13  
description  
The SN54LVCH245A octal bus transceiver is designed for 2.7-V to 3.6-V V  
operation and the  
CC  
SN74LVCH245A octal bus transceiver is designed for 1.65-V to 3.6-V V  
operation.  
CC  
These devices are designed for asynchronous communication between data buses. These devices transmit  
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the  
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are  
effectively isolated.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN54LVCH245A is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74LVCH245A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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