5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN74LVCH244DW
SN74LVCH244DW PDF预览

SN74LVCH244DW

更新时间： 2024-11-23 13:00:27
品牌 Logo 应用领域
德州仪器 - TI 驱动器
页数 文件大小 规格书
23页 665K
描述
Octal Buffer/Driver With 3-State Outputs 20-SOIC -40 to 85

阅读下载

中文翻译

获取价格

SN74LVCH244DW 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Obsolete包装说明：SOP, SOP20,.4
Reach Compliance Code：not_compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：5.18
Is Samacsys：N控制类型：ENABLE LOW
系列：LVC/LCX/ZJESD-30 代码：R-PDSO-G20
长度：12.8 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.024 A
位数：4功能数量：2
端口数量：2端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP20,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：3.3 VProp。Delay @ Nom-Sup：6.5 ns
传播延迟（tpd）：6.5 ns认证状态：Not Qualified
座面最大高度：2.65 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.5 mmBase Number Matches：1

SN74LVCH244DW 数据手册

 浏览型号SN74LVCH244DW的Datasheet PDF文件第2页浏览型号SN74LVCH244DW的Datasheet PDF文件第3页浏览型号SN74LVCH244DW的Datasheet PDF文件第4页浏览型号SN74LVCH244DW的Datasheet PDF文件第5页浏览型号SN74LVCH244DW的Datasheet PDF文件第6页浏览型号SN74LVCH244DW的Datasheet PDF文件第7页 
SN54LVCH244A, SN74LVCH244A  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES009O–JULY 1995–REVISED FEBRUARY 2007  
FEATURES  
•
•
•
•
Operate From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 5.9 ns at 3.3 V  
•
•
•
•
Ioff Supports Partial-Power-Down Mode  
Operation  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
Typical VOLP (Output Ground Bounce)  
<0.8 V at VCC = 3.3 V, TA = 25°C  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
•
•
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
ESD Protection Exceeds JESD 22  
–
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Support Mixed-Mode Signal Operation on All  
Ports  
(5-V Input/Output Voltage With 3.3-V VCC  
)
1000-V Charged-Device Model (C101)  
SN54LVCH244A . . . J OR W PACKAGE  
SN74LVCH244A . . . DB, DBQ, DGV, DW,  
NS, OR PW PACKAGE  
SN74LVCH244A . . . RGY PACKAGE  
(TOP VIEW)  
SN54LVCH244A . . . FK PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
1OE  
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
GND  
V
CC  
1
20  
3
9
2
1
20 19  
18  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
2A1  
4
5
6
7
8
19  
18  
17  
16  
15  
14  
13  
12  
2
3
4
5
6
7
8
9
1A1  
2Y4  
1A2  
2Y3  
1A3  
2Y2  
1A4  
2Y1  
2OE  
1Y1  
2A4  
1Y2  
2A3  
1Y3  
2A2  
1Y4  
17  
16  
15  
14  
10 11 12 13  
10  
11  
DESCRIPTION/ORDERING INFORMATION  
The SN54LVCH244A octal buffer/line driver is designed for 2.7-V to 3.6-V VCC operation, and the  
SN74LVCH244A octal buffer/line driver is designed for 1.65-V to 3.6-V VCC operation.  
These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low,  
these devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the  
high-impedance state.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown  
resistors with the bus-hold circuitry is not recommended.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the  
outputs, preventing damaging current backflow through the devices when they are powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1995–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...23

中文翻译

下载PDF

与SN74LVCH244DW相关器件

型号 品牌 获取价格 描述 数据表
SN74LVCH244DWR TI

获取价格

 		LVC/LCX/Z SERIES, DUAL 4-BIT DRIVER, TRUE OUTPUT, PDSO20
SN74LVCH245 TI

获取价格

 		OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS
SN74LVCH245A TI

获取价格

 		OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVCH245ADB TI

获取价格

 		OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVCH245ADBLE TI

获取价格

 		OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVCH245ADBR TI

获取价格

 		OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVCH245ADBRE4 TI

获取价格

 		OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVCH245ADBRG4 TI

获取价格

 		OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVCH245ADGVR TI

获取价格

 		OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVCH245ADGVRE4 TI

获取价格

 		OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

与SN74LVCH244DW相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证