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SN74LVCH16541ADL

更新时间： 2024-11-05 23:06:23
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德州仪器 - TI 驱动器输出元件
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9页 141K
描述
16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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SN74LVCH16541ADL 数据手册

 浏览型号SN74LVCH16541ADL的Datasheet PDF文件第2页浏览型号SN74LVCH16541ADL的Datasheet PDF文件第3页浏览型号SN74LVCH16541ADL的Datasheet PDF文件第4页浏览型号SN74LVCH16541ADL的Datasheet PDF文件第5页浏览型号SN74LVCH16541ADL的Datasheet PDF文件第6页浏览型号SN74LVCH16541ADL的Datasheet PDF文件第7页 
SN74LVCH16541A  
16-BIT BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
SCAS567G – MARCH 1996 – REVISED JUNE 1998  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1OE1  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
1OE2  
1A1  
1A2  
GND  
1A3  
1A4  
1
2
3
4
5
6
7
8
9
48  
47  
46  
45  
44  
43  
42  
41  
40  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Power Off Disables Outputs, Permitting  
Live Insertion  
V
V
CC  
CC  
1Y5  
1Y6  
1A5  
1A6  
Supports Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
GND 10  
39 GND  
1Y7  
1Y8  
1A7  
1A8  
11  
12  
38  
37  
3.3-V V  
)
CC  
ESD Protection Exceeds 2000 V Per  
2Y1 13  
2Y2 14  
GND 15  
2Y3 16  
2Y4 17  
36 2A1  
35 2A2  
34 GND  
33 2A3  
32 2A4  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
V
18  
31  
V
CC  
CC  
2Y5 19  
2Y6 20  
GND 21  
2Y7 22  
2Y8 23  
2OE1 24  
30 2A5  
29 2A6  
28 GND  
27 2A7  
26 2A8  
25 2OE2  
Package Options Include Thin-Shrink  
Small-Outline (DGG) and Plastic 300-mil  
Shrink Small-Outline (DL) Packages  
description  
This 16-bit buffer/driver is designed for 1.65-V to 3.6-V V  
operation.  
CC  
The SN74LVCH16541A is a noninverting 16-bit buffer composed of two 8-bit sections with separate  
output-enable signals. For either 8-bit buffer section, the two output-enable (1OE1 and 1OE2 or 2OE1 and  
2OE2) inputs must be low for the corresponding Y outputs to be active. If either output-enable input is high, the  
outputs of that 8-bit buffer section are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74LVCH16541A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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SN74LVCH16541ADL 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVCH16541ADLR TI

完全替代

 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVCH16541ADGVR TI

完全替代

 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVCH16541ADGGR TI

完全替代

 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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