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SN74LVCH16540ADGG

更新时间： 2024-11-03 22:36:35
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德州仪器 - TI 驱动器输出元件
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9页 141K
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16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

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SN74LVCH16540ADGG 数据手册

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SN74LVCH16540A  
16-BIT BUFFER/DRIVER  
WITH 3-STATE OUTPUTS  
SCAS569G – MARCH 1996 – REVISED JUNE 1998  
DGG OR DL PACKAGE  
(TOP VIEW)  
Member of the Texas Instruments  
Widebus Family  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE1  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
1OE2  
1A1  
1A2  
GND  
1A3  
1A4  
2
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
3
= 3.3 V, T = 25°C  
CC  
A
4
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
5
= 3.3 V, T = 25°C  
A
6
Supports Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
7
V
V
CC  
CC  
8
1Y5  
1Y6  
GND  
1Y7  
1Y8  
2Y1  
2Y2  
GND  
2Y3  
2Y4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
3.3-V V  
)
9
CC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Power Off Disables Outputs, Permitting  
Live Insertion  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin-Shrink  
Small-Outline (DGG) Packages  
V
V
CC  
CC  
2Y5  
2Y6  
GND  
2Y7  
2Y8  
2A5  
2A6  
GND  
2A7  
2A8  
description  
This 16-bit buffer/driver is designed for 1.65-V to  
3.6-V operation, and provides  
2OE1  
2OE2  
V
a
CC  
high-performance bus interface for wide data  
paths.  
The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2)  
input is high, all corresponding outputs are in the high-impedance state.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN74LVCH16540A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC and Widebus are trademarks of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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