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SN74LVCH162244ADGG PDF预览

SN74LVCH162244ADGG

更新时间: 2024-09-13 23:06:23
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
10页 179K
描述
16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

SN74LVCH162244ADGG 数据手册

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ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢇꢈ ꢉꢊ ꢊꢃ ꢃꢋ  
ꢈ ꢉ ꢌꢍꢎ ꢏ ꢍꢐꢑ ꢑ ꢒꢓ ꢔꢕ ꢓꢎ ꢅ ꢒ ꢓ  
ꢖ ꢎꢏ ꢇ ꢗ ꢌꢀꢏꢋꢏ ꢒ ꢘ ꢐꢏ ꢙ ꢐꢏꢀ  
SCAS545K − OCTOBER 1995 − REVISED OCTOBER 2003  
DL, DGG, OR DGV PACKAGE  
(TOP VIEW)  
D
Member of the Texas Instruments  
WidebusFamily  
D
D
D
D
Operates From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
2OE  
1A1  
1A2  
GND  
1A3  
1A4  
2
3
Max t of 4.4 ns at 3.3 V  
pd  
4
Output Ports Have Equivalent 26-Series  
Resistors, So No External Resistors Are  
Required  
5
6
7
V
V
CC  
CC  
D
D
D
D
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
= 3.3 V, T = 25°C  
A
OLP  
CC  
8
2Y1  
2Y2  
GND  
2Y3  
2Y4  
3Y1  
3Y2  
GND  
3Y3  
3Y4  
2A1  
2A2  
GND  
2A3  
2A4  
3A1  
3A2  
GND  
3A3  
3A4  
9
Typical V  
(Output V  
Undershoot)  
OHV  
OH  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
>2 V at V  
= 3.3 V, T = 25°C  
CC  
A
I
Supports Partial-Power-Down Mode  
off  
Operation  
Supports Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
3.3-V V  
)
CC  
D
Bus Hold on Data Inputs Eliminates the  
Need for External Pullup/Pulldown  
Resistors  
V
V
CC  
CC  
4Y1  
4Y2  
GND  
4Y3  
4Y4  
4A1  
4A2  
GND  
4A3  
4A4  
3OE  
D
D
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
− 2000-V Human-Body Model (A114-A)  
− 200-V Machine Model (A115-A)  
4OE  
− 1000-V Charged-Device Model (C101)  
description/ordering information  
This 16-bit buffer/driver is designed for 1.65-V to 3.6-V V  
operation.  
CC  
The SN74LVCH162244A is designed specifically to improve both the performance and density of 3-state  
memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used  
as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low  
output-enable (OE) inputs.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
Tube  
SN74LVCH162244ADL  
SN74LVCH162244ADLR  
SN74LVCH162244AGR  
SN74LVCH162244AVR  
SSOP − DL  
LVCH162244A  
Tape and reel  
−40°C to 85°C  
TSSOP − DGG Tape and reel  
TVSOP − DGV Tape and reel  
LVCH162244A  
LN2244A  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
ꢏꢥ  
Copyright 2003, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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