5秒后页面跳转
SN74LVCE161284DL PDF预览

SN74LVCE161284DL

更新时间: 2024-11-01 22:16:15
品牌 Logo 应用领域
德州仪器 - TI 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
14页 235K
描述
19 BIT IEEE 1284 TRANSLATION TRANSCEIVER WITH ERROR FREE POWER UP

SN74LVCE161284DL 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SSOP
包装说明:GREEN, PLASTIC, SSOP-48针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.39Is Samacsys:N
差分输出:NO驱动器位数:14
输入特性:STANDARD接口集成电路类型:LINE TRANSCEIVER
接口标准:IEEE-1284JESD-30 代码:R-PDSO-G48
JESD-609代码:e4长度:15.875 mm
湿度敏感等级:1位数:19
功能数量:13端子数量:48
最高工作温度:70 °C最低工作温度:
输出特性:3-STATE最大输出低电流:0.084 A
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
最大接收延迟:18 ns接收器位数:13
座面最大高度:2.79 mm最大压摆率:45 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V电源电压1-最大:5.5 V
电源电压1-分钟:3 V电源电压1-Nom:5 V
表面贴装:YES温度等级:COMMERCIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.635 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED最大传输延迟:30 ns
宽度:7.49 mmBase Number Matches:1

SN74LVCE161284DL 数据手册

 浏览型号SN74LVCE161284DL的Datasheet PDF文件第2页浏览型号SN74LVCE161284DL的Datasheet PDF文件第3页浏览型号SN74LVCE161284DL的Datasheet PDF文件第4页浏览型号SN74LVCE161284DL的Datasheet PDF文件第5页浏览型号SN74LVCE161284DL的Datasheet PDF文件第6页浏览型号SN74LVCE161284DL的Datasheet PDF文件第7页 
ꢀꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢈꢊ ꢋꢃ  
ꢈ ꢌ ꢍꢎꢏ ꢐ ꢏꢇ ꢇꢇ ꢈ ꢊ ꢋ ꢃ ꢐ ꢑꢒꢁꢀ ꢄꢒꢐ ꢏꢓ ꢁ ꢐ ꢑꢒꢁꢀ ꢆꢇ ꢏ ꢅꢇ ꢑ  
ꢔ ꢏꢐ ꢕ ꢇꢑ ꢑꢓꢑ ꢍꢖꢑ ꢇꢇ ꢗ ꢓ ꢔꢇ ꢑ ꢘ ꢗ  
SCES541 − JANUARY 2004  
DGG OR DL PACKAGE  
(TOP VIEW)  
D
D
D
Auto-Power-Up Feature Prevents Printer  
Errors When Printer Is Turned On, But No  
Valid Signal Is at A9−A13 Pins  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
HD  
A9  
DIR  
Y9  
1.4-kPullup Resistors Integrated on All  
Open-Drain Outputs Eliminate the Need for  
Discrete Resistors  
2
3
A10  
A11  
A12  
A13  
Y10  
Y11  
Y12  
Y13  
4
Designed for the IEEE Std 1284-I (Level-1  
Type) and IEEE Std 1284-II (Level-2 Type)  
Electrical Specifications  
5
6
7
V
V
CABLE  
CC  
A1  
CC  
D
D
D
D
Flow-Through Architecture Optimizes PCB  
Layout  
8
B1  
9
A2  
GND  
A3  
A4  
A5  
A6  
GND  
A7  
B2  
GND  
B3  
B4  
B5  
B6  
GND  
B7  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
I
and Power-Up 3-State Support Hot  
off  
Insertion  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection  
4 kV − Human-Body Model  
8 kV − IEC 61000-4-2, Contact Discharge  
(Connector Pins)  
A8  
B8  
V
V
CABLE  
CC  
CC  
15 kV − IEC 61000-4-2, Air-Gap  
Discharge (Connector Pins)  
15 kV − Human-Body Model (Connector  
Pins)  
PERI LOGIC IN  
PERI LOGIC OUT  
C14  
C15  
C16  
A14  
A15  
A16  
A17  
C17  
description/ordering information  
HOST LOGIC OUT  
HOST LOGIC IN  
The SN74LVCE161284 is designed for 3-V to  
3.6-V V  
operation. This device provides  
CC  
asynchronous two-way communication between  
data buses. The control-function implementation  
minimizes external timing requirements.  
This device has eight bidirectional bits; data can flow in the A-to-B direction when the direction-control  
input (DIR) is high and in the B-to-A direction when DIR is low. This device also has five drivers that drive the  
cable side, and four receivers. The SN74LVCE161284 has one receiver dedicated to the HOST LOGIC line and  
a driver to drive the PERI LOGIC line.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
Tube  
SN74LVCE161284DL  
SSOP − DL  
LVCE161284  
0°C to 70°C  
Tape and reel SN74LVCE161284DLR  
TSSOP − DGG  
Tape and reel SN74LVCE161284DGGR LVCE161284  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢐꢥ  
Copyright 2004, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVCE161284DL 替代型号

型号 品牌 替代类型 描述 数据表
74LVCE161284DLRG4 TI

完全替代

19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP
74LVCE161284DLG4 TI

完全替代

19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP
SN74LVCE161284DLR TI

完全替代

19 BIT IEEE 1284 TRANSLATION TRANSCEIVER WITH ERROR FREE POWER UP

与SN74LVCE161284DL相关器件

型号 品牌 获取价格 描述 数据表
SN74LVCE161284DLR TI

获取价格

19 BIT IEEE 1284 TRANSLATION TRANSCEIVER WITH ERROR FREE POWER UP
SN74LVCE161284VR TI

获取价格

19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP
SN74LVCH162244 TI

获取价格

16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVCH162244A TI

获取价格

16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVCH162244A_14 TI

获取价格

16-Bit Buffer/Driver with 3-State Outputs
SN74LVCH162244ADGG TI

获取价格

16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVCH162244ADGGR TI

获取价格

16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVCH162244ADGVR TI

获取价格

16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVCH162244ADL TI

获取价格

16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
SN74LVCH162244ADLR TI

获取价格

16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS