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SN74LVCE161284 PDF预览

SN74LVCE161284

更新时间： 2024-09-13 22:16:15
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
14页 235K
描述
19 BIT IEEE 1284 TRANSLATION TRANSCEIVER WITH ERROR FREE POWER UP

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中文翻译

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SN74LVCE161284 数据手册

 浏览型号SN74LVCE161284的Datasheet PDF文件第2页浏览型号SN74LVCE161284的Datasheet PDF文件第3页浏览型号SN74LVCE161284的Datasheet PDF文件第4页浏览型号SN74LVCE161284的Datasheet PDF文件第5页浏览型号SN74LVCE161284的Datasheet PDF文件第6页浏览型号SN74LVCE161284的Datasheet PDF文件第7页 
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SCES541 − JANUARY 2004  
DGG OR DL PACKAGE  
(TOP VIEW)  
D
D
D
Auto-Power-Up Feature Prevents Printer  
Errors When Printer Is Turned On, But No  
Valid Signal Is at A9−A13 Pins  
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HD  
A9  
DIR  
Y9  
1.4-kΩ Pullup Resistors Integrated on All  
Open-Drain Outputs Eliminate the Need for  
Discrete Resistors  
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3
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A11  
A12  
A13  
Y10  
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Y12  
Y13  
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Designed for the IEEE Std 1284-I (Level-1  
Type) and IEEE Std 1284-II (Level-2 Type)  
Electrical Specifications  
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V
V
CABLE  
CC  
A1  
CC  
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D
D
D
Flow-Through Architecture Optimizes PCB  
Layout  
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B1  
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A2  
GND  
A3  
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A5  
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GND  
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B2  
GND  
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B5  
B6  
GND  
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I
and Power-Up 3-State Support Hot  
off  
Insertion  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection  
−
−
4 kV − Human-Body Model  
8 kV − IEC 61000-4-2, Contact Discharge  
(Connector Pins)  
A8  
B8  
V
V
CABLE  
CC  
CC  
−
−
15 kV − IEC 61000-4-2, Air-Gap  
Discharge (Connector Pins)  
15 kV − Human-Body Model (Connector  
Pins)  
PERI LOGIC IN  
PERI LOGIC OUT  
C14  
C15  
C16  
A14  
A15  
A16  
A17  
C17  
description/ordering information  
HOST LOGIC OUT  
HOST LOGIC IN  
The SN74LVCE161284 is designed for 3-V to  
3.6-V V  
operation. This device provides  
CC  
asynchronous two-way communication between  
data buses. The control-function implementation  
minimizes external timing requirements.  
This device has eight bidirectional bits; data can flow in the A-to-B direction when the direction-control  
input (DIR) is high and in the B-to-A direction when DIR is low. This device also has five drivers that drive the  
cable side, and four receivers. The SN74LVCE161284 has one receiver dedicated to the HOST LOGIC line and  
a driver to drive the PERI LOGIC line.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
T
A
PACKAGE  
Tube  
SN74LVCE161284DL  
SSOP − DL  
LVCE161284  
0°C to 70°C  
Tape and reel SN74LVCE161284DLR  
TSSOP − DGG  
Tape and reel SN74LVCE161284DGGR LVCE161284  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2004, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...14

中文翻译

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