Datasheet > 逻辑 > 总线驱动器/收发器> SN74LVC646DB

SN74LVC646DB

更新时间： 2024-09-28 23:06:23

品牌	Logo	应用领域
德州仪器 - TI		总线驱动器总线收发器逻辑集成电路光电二极管输出元件输入元件
页数	文件大小	规格书
9页	126K
描述
OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

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SN74LVC646DB 技术参数

生命周期：	Obsolete	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.49
Is Samacsys：	N	其他特性：	SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED/REAL TIME DATA
系列：	LVC/LCX/Z	JESD-30 代码：	R-PDSO-G24
长度：	8.2 mm	逻辑集成电路类型：	REGISTERED BUS TRANSCEIVER
位数：	8	功能数量：	1
端口数量：	2	端子数量：	24
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	3-STATE	输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY	封装代码：	SSOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, SHRINK PITCH
认证状态：	Not Qualified	座面最大高度：	2 mm
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	2.7 V
标称供电电压 (Vsup)：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	宽度：	5.3 mm
Base Number Matches：	1

SN74LVC646DB 数据手册

SN74LVC646

OCTAL BUS TRANSCEIVER AND REGISTER

WITH 3-STATE OUTPUTS

SCAS302A – JANUARY 1993 – REVISED JULY 1995

DB, DW, OR PW PACKAGE

(TOP VIEW)

EPIC (Enhanced-Performance Implanted

CMOS) Submicron Process

Typical V

< 0.8 V at V

(Output Ground Bounce)

OLP

CLKAB

SAB

DIR

GND

= 3.3 V, T = 25°C

CLKBA

SBA

Typical V

> 2 V at V

(Output V

Undershoot)

OHV

= 3.3 V, T = 25°C

Latch-Up Performance Exceeds 250 mA

Per JEDEC Standard JESD-17

Package Options Include Plastic

Small-Outline (DW), Shrink Small-Outline

(DB), and Thin Shrink Small-Outline (PW)

Packages

description

This octal bus transceiver and register is designed for 2.7-V to 3.6-V V

operation.

The SN74LVC646 consists of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for

multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus

is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input.

Figure 1 illustrates the four fundamental bus-management functions that can be performed with the

SN74LVC646.

Output-enable (OE) and direction-control (DIR) inputs control the transceiver functions. In the transceiver

mode, data present at the high-impedance port can be stored in either register or in both.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. DIR

determines which bus receives data when OE is low. In the isolation mode (OE high), A data can be stored in

one register and B data can be stored in the other register.

When an output function is disabled, the input function is still enabled and can be used to store and transmit

data. Only one of the two buses, A or B, may be driven at a time.

To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup

resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74LVC646 is characterized for operation from –40°C to 85°C.

FUNCTION TABLE

INPUTS

DATA I/Os

B1 – B8

OPERATION OR FUNCTION

DIR

CLKAB

CLKBA

SAB

SBA

A1 – A8

Input

†

↑

Unspecified

Input

Store A, B unspecified

Store B, A unspecified

Store A and B data

†

↑

Unspecified

↑

H or L

↑

H or L

Input

Input disabled

Output

Input disabled

Input

Isolation, hold storage

Real-time B data to A bus

Stored B data to A bus

Real-time A data to B bus

Stored A data to B bus

H or L

Output

Input

Output

H or L

Input

Output

†

The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled;

i.e., data at the bus pins is stored on every low-to-high transition of the clock inputs.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...9

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与SN74LVC646DB相关器件

型号	品牌	获取价格	描述	数据表
SN74LVC646DW	TI	获取价格	OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
SN74LVC646DWR	TI	获取价格	LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
SN74LVC646PW	TI	获取价格	OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
SN74LVC652A	TI	获取价格	OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVC652ADB	TI	获取价格	OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN74LVC652ADBR	TI	获取价格	LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SSOP-
SN74LVC652ADBRE4	TI	获取价格	IC LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SS
SN74LVC652ADBRG4	TI	获取价格	IC LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SS
SN74LVC652ADGVR	TI	获取价格	LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24
SN74LVC652ADW	TI	获取价格	OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

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