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SN74LVC543APWT PDF预览

SN74LVC543APWT

更新时间： 2024-11-06 05:16:59
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
10页 174K
描述
OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

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中文翻译

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SN74LVC543APWT 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP, TSSOP24,.25针数：24
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：5.14其他特性：INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
控制类型：INDEPENDENT CONTROL计数方向：BIDIRECTIONAL
系列：LVC/LCX/ZJESD-30 代码：R-PDSO-G24
JESD-609代码：e4长度：7.8 mm
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER最大I（ol）：0.024 A
湿度敏感等级：1位数：8
功能数量：1端口数量：2
端子数量：24最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP24,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法：TR峰值回流温度（摄氏度）：260
电源：3.3 V最大电源电流（ICC）：0.01 mA
Prop。Delay @ Nom-Sup：7 ns传播延迟（tpd）：9.5 ns
认证状态：Not Qualified施密特触发器：No
座面最大高度：1.2 mm子类别：Bus Driver/Transceiver
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED翻译：N/A
宽度：4.4 mmBase Number Matches：1

SN74LVC543APWT 数据手册

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SCAS299H − JANUARY 1993 − REVISED AUGUST 2003  
DB, DW, OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
Operates From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max t of 7 ns at 3.3 V  
pd  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
LEBA  
OEBA  
A1  
V
CC  
2
CEBA  
B1  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
3
= 3.3 V, T = 25°C  
A
4
A2  
B2  
Typical V  
(Output V  
Undershoot)  
OHV  
OH  
5
A3  
B3  
>2 V at V  
= 3.3 V, T = 25°C  
CC  
A
6
A4  
B4  
Supports Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
7
A5  
B5  
8
A6  
B6  
3.3-V V  
)
CC  
9
A7  
B7  
D
D
I
Supports Partial-Power-Down Mode  
off  
10  
11  
12  
A8  
CEAB  
GND  
B8  
LEAB  
OEAB  
Operation  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
description/ordering information  
This octal registered transceiver is designed for 1.65-V to 3.6-V V  
operation.  
CC  
The SN74LVC543A contains two sets of D-type latches for temporary storage of data flowing in either direction.  
Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each  
register to permit independent control in either direction of data flow.  
The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and  
LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB places the A  
latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the  
data present at the output of the A latches. Data flow for B to A is similar to that of A to B, but uses CEBA, LEBA,  
and OEBA.  
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,  
off  
off  
preventing damaging current backflow through the device when it is powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to V  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup  
CC  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
ORDERING INFORMATION  
ORDERABLE  
†
T
PACKAGE  
TOP-SIDE MARKING  
A
PART NUMBER  
SN74LVC543ADW  
SN74LVC543ADWR  
SN74LVC543ADBR  
SN74LVC543APW  
SN74LVC543APWR  
SN74LVC543APWT  
Tube of 25  
SOIC − DW  
SSOP − DB  
LVC543A  
LC543A  
Reel of 2000  
Reel of 2000  
Tube of 60  
−40°C to 85°C  
TSSOP − PW  
Reel of 2000  
Reel of 250  
LC543A  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
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Copyright 2003, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

中文翻译

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SN74LVC543APWT 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC543APWR TI

完全替代

 OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74LVC543APW TI

完全替代

 OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74LVC543ADW TI

完全替代

 OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

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SN74LVC543DW TI

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 		OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
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 		OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74LVC544ADBLE TI

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SN74LVC544ADBR TI

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SN74LVC544APWLE TI

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 		LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24, tssop-24
SN74LVC544APWR TI

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 		LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDSO24, TSSOP-24
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