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SN74LVC543ADBRE4 PDF预览

SN74LVC543ADBRE4

更新时间: 2024-11-05 05:16:59
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
12页 203K
描述
OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

SN74LVC543ADBRE4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:GREEN, PLASTIC, SSOP-24针数:24
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.55Is Samacsys:N
其他特性:INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION控制类型:INDEPENDENT CONTROL
计数方向:BIDIRECTIONAL系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G24JESD-609代码:e4
长度:8.2 mm逻辑集成电路类型:REGISTERED BUS TRANSCEIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP24,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:7 ns传播延迟(tpd):9.5 ns
认证状态:Not Qualified座面最大高度:2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
翻译:N/A宽度:5.3 mm
Base Number Matches:1

SN74LVC543ADBRE4 数据手册

 浏览型号SN74LVC543ADBRE4的Datasheet PDF文件第2页浏览型号SN74LVC543ADBRE4的Datasheet PDF文件第3页浏览型号SN74LVC543ADBRE4的Datasheet PDF文件第4页浏览型号SN74LVC543ADBRE4的Datasheet PDF文件第5页浏览型号SN74LVC543ADBRE4的Datasheet PDF文件第6页浏览型号SN74LVC543ADBRE4的Datasheet PDF文件第7页 
SN74LVC543A  
OCTAL REGISTERED TRANSCEIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS299HJANUARY 1993REVISED MARCH 2005  
FEATURES  
DB, DW, OR PW PACKAGE  
(TOP VIEW)  
Operates From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 7 ns at 3.3 V  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
LEBA  
OEBA  
A1  
V
CC  
2
CEBA  
B1  
Typical VOLP (Output Ground Bounce)  
3
<0.8 V at VCC = 3.3 V, TA = 25°C  
4
A2  
B2  
Typical VOHV (Output VOH Undershoot)  
>2 V at VCC = 3.3 V, TA = 25°C  
5
A3  
B3  
6
A4  
B4  
7
Supports Mixed-Mode Signal Operation on All  
Ports (5-V Input/Output Voltage With  
A5  
B5  
8
A6  
B6  
9
3.3-V VCC  
)
A7  
B7  
10  
11  
12  
A8  
CEAB  
GND  
B8  
LEAB  
OEAB  
Ioff Supports Partial-Power-Down Mode  
Operation  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
DESCRIPTION/ORDERING INFORMATION  
This octal registered transceiver is designed for 1.65-V to 3.6-V VCC operation.  
The SN74LVC543A contains two sets of D-type latches for temporary storage of data flowing in either direction.  
Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register  
to permit independent control in either direction of data flow.  
The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and  
LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB places the A  
latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the  
data present at the output of the A latches. Data flow for B to A is similar to that of A to B, but uses CEBA, LEBA,  
and OEBA.  
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LVC543ADW  
TOP-SIDE MARKING  
LVC543A  
Tube of 25  
SOIC – DW  
SSOP – DB  
Reel of 2000  
Reel of 2000  
Tube of 60  
SN74LVC543ADWR  
SN74LVC543ADBR  
SN74LVC543APW  
LC543A  
LC543A  
–40°C to 85°C  
TSSOP – PW  
Reel of 2000  
Reel of 250  
SN74LVC543APWR  
SN74LVC543APWT  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1993–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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