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SN74LVC2G17DRYR PDF预览

SN74LVC2G17DRYR

更新时间: 2024-11-20 17:14:59
品牌 Logo 应用领域
友台半导体 - UMW 逻辑集成电路
页数 文件大小 规格书
9页 1067K
描述
逻辑集成电路

SN74LVC2G17DRYR 数据手册

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R
UMW  
SN74LVC2G17  
General Description  
Features  
The SN74LVC2G17 is a high performan  
Extremely High Speed: tPD 2.0ns (typical) at V  
CC= 5.0V  
Designed for 1.65V to 5.5V VCC Operation  
Overvoltage Tolerant Inputs  
ce dual buffer operating from a 1.65 to  
5.5V supply. At VCC = 3.0V,high impedan  
ce TTL compatible inputs significantly  
LVTTL Compatible − Interface Capability with 5.0V  
TTL Logic with VCC = 3.0V (2.7−3.3)  
reduce current loading to input drivers  
while the TTL compatible outputs offer  
improved switching noise performance.  
LVCMOS Compatible  
24mA Balanced Output Sink and Source Capability at  
VCC = 3.0V  
Near Zero Static Supply Current Substantially Reduces  
System Power Requirements  
Chip Complexity: FET = 72; Equivalent Gate = 18  
These Devices are Pb−Free and are RoHS Compliant  
NLV Prefix for Automotive and Other  
Applications Requiring Unique Site and Control  
Change Requirements; AEC−Q100 Qualified and  
PPAP Capable  
Pin Configuration  
www.umw-ic.com  
1
UTD Semiconductor Co.,Limited  

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